I have designed a two-stage power supply and control power circuit. The design allows the entire system to be powered and controlled using a single external push switch (when pressed, it is shorted to ground and when released the line is open) connected to the Opto Power Enable circuit. The same switch both turns ON the main 48 V rail and later allows the MCU (when ON) to sense user input (for example, to wake up, activate Bluetooth). The 48V input is coming from the battery. The 48V first goes through series of bulk caps connected to the Phase driving MOSFETS and then it comes to logic board.

Initial Power-OFF State

1. The 48 V input from the battery passes through the slow blow fuse and reverse-polarity MOSFET (Q1) SQ2337ES-T1_BE3 and fuse, but the high-side MOSFET Q7 (FQU12P10) is OFF.

2. When Q7 is off, no voltage reaches the 48 V -> 12 V DC DC converter, so all downstream supplies (12 V, 5 V, 3.3 V) are also off.

3. Only a few components remain biased — mainly the optocoupler input (U10) and small bias resistors — so standby current is <1 mA.

User Presses the Power Switch

1. The LED- is connected to the Switch input which is shorted to ground when switch is pressed and the optocoupler turns on and drives its transistor output low.

2. This pulls down the collector of QF2 (2N5551) through R78/R79, turning Q7 ON (QF2 is OFF at this time)allowing 48 V to reach the DC-DC converter TEL15-4811N.

At this point, the 12 V, 5 V, and 3.3 V rails start up, and the MCU becomes powered.

Power Keeper

1. As the 3.3 V rail rises, the MCU and the logic circuit (U9/U4) are powered.

2. The User will keep the switch pressed until MCU takes control (100ms time approx)

3. The latch is maintained from the MCU control logic which turns ON the QF2. The switch can be released, and the 48 V supply stays ON continuously

MCU-Controlled Power-Off (Power Kill)

1. In Idle state to save power, the MCU asserts PWR_KILL_SIG_A/B to logic gates (U9 and U4).

2. The AND-gate output then drives QF2 base low, turning QF2 OFF.

3. With QF2 off, Q7 gate rises to 48 V via pull-ups (R78/R79), and Q7 turns OFF.

4. The 48 V line to the DC-DC converters is cut, removing all secondary supplies and fully shutting down the system.

5. The standby current returns to microamp levels, leaving only the optocoupler input bias active.

Questions for review

1. Is the P-MOSFET-based reverse polarity protection design good?, or should I use two back to back P-MOSFET for reverse current blocking ?

2. For surge handling, is SMBJ58A (58V) appropriate for 48V nominal?

3. Is the optocoupler latch (LTV-357T) stable and low-leakage, or is there a better MOSFET-based approach?

4. Do I need to add a self latch circuit to keep the Q7 turn on even before MCU takes over the control ?

Any suggestions to further reduce standby current and improve overall robustness from ESD, Short Circuit and Overvoltage?