Just as an aside, the reason you usually only find adders and not subtractors is because using two's complement, you only need one instance of logic block (adder) in a circuit to do both operations. Consider that die space is usually prime real estate that to a large extent determines the price of a chip together with the amount of process steps required for manufacturing, and it should be no surprise that (usually) no space is wasted on superfluous stuff...

I have heard that for division of binary numbers you need to understand well subtraction so just like we can multiply 2 numbers with full adders maybe we can divide 2 numbers with full subtractors thats why I want to know how to edo subtraction using full subtractors.

Multiplication in hardware is a combination of adders and bit shifting. Thus multiplying two 64-bit numbers, however large, only takes 64 bit shifts plus at max. 64 additions. This is not only incredibly fast, but also cheap in circuitry. You only need an 128 bit adder, a 128-bit shift register, another 64-bit shift register (or an interconnect fabric that provides the bit-shifted operands), a 128-bit result register, a little glue logic and possibly an intermediary 128-bit register (that loops the intermediary adding result back into the adder). Division will involve additional logic (not just bit shifting and adding/subtracting).

Actually, trying to brute-force division with a bunch of subtractions alone is slow like molasses (like it would if doing multiply with adders alone). For some idea wrt to hardware division look for example here: https://electronics.stackexchange.com/questions/155899/implementing-integer-division-in-hardware. It is somewhat similar to multiplication in that it also involves bit shifting, but note the additional comparison logic required...

That said, fast division in HW is still a topic for research papers. As an example here a paper from 2005: https://www.researchgate.net/publication/4156467_A_hardware_algorithm_for_integer_division (disclaimer: I haven't read that paper, so i don't know whether it is a good paper or just hot garbage. Me linking to it is not an endorsement or judgement of its quality. I only linked to it to demonstrate that HW integer division is still a subject for academic and/or scientific papers even in this day and age...)

I think multiplication can be done without bit shifting just by using full adders and taking advantage of the vertical addition of 2 binary numbers.However we are missing the point here.Is there a similar 'function' which does the same for vertical subtraction?