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"Also, if there is a way to control this drop (without using an oamp), what are the design rules, or perhaps the rules of thumbs ?" "I reformulate this question:do you see any reason to use a FET ...
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#1: Initial revision
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2020-11-09T09:49:30Z (over 3 years ago)
"_Also, if there is a way to control this drop (without using an oamp), what are the design rules, or perhaps the rules of thumbs ?"_ "_I reformulate this question:do you see any reason to use a FET follower?_" As outlined by Olin Lathrop, the voltage drop (that means: The potential difference betwqeen G and S) depends, of course, on the Id=f(Vgs) relation and is less predictable if compared with bipolar transistors. More than that, I think this question concerns the **DC voltage** properties only. As far as the second quoted question is concerned, I think we have to consider **signals** (if this stage is used as a **buffer**). And in this respect, the transconductance of the device matters primarily. Look at the **gain formula** for a CS stage: **A=gmRs/(1+gmRs)= Rs/[(1/gm)+Rs]** As we can see, for Rs>>1/gm the gain approaches unity. Of course, the exactness of the buffer function requires a transconductance as large as possible. And we know that, generally, the BJT can provide a larger transconductance.