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Q&A CAN Bus - Internal Oscillator

You are making this too complicated. The only thing that matters is the percentage mismatch between any two clocks on a CAN bus. You seem to imply that you are willing to guarantee the -10 °C to ...

posted 4y ago by Olin Lathrop‭

Answer
#1: Initial revision by user avatar Olin Lathrop‭ · 2020-12-19T16:09:57Z (about 4 years ago)
You are making this too complicated.  The only thing that matters is the percentage mismatch between any two clocks on a CAN bus.

You seem to imply that you are willing to guarantee the -10 &deg;C to +85 &deg;C temperature range, so the oscillator will be within -1.9% to +2.3%.  Any two devices could therefore be off by 4.2% from each other.

The question then becomes whether CAN works with 4.2% clock mismatch between devices.  To answer that, you look at the CAN spec to see how clock mismatch is handled.

Various things happen within each bit time on a CAN bus.  This is handled by transmitters and receivers breaking each bit into multiple <i>time quanta</i>.  Usually for robust implementations, there are 8 to 20 time quanta per bit.  You can use less for specialized implementations, especially if you know that only your specific devices will be on the bus.  In theory the upper limit is much higher, but most hardware can't be configured for more than 20.

The first quanta in a bit is the <i>sync</i> segment.  If the bit transition occurs outside this segment, then the bit is either shortened or lengthened by the <i>synchronization jump width</i>.  This is almost always set to 1.

If you allow arbitrary nodes to connect to the bus, then you should assume they have as many as 20 time quanta per bit, and can't adjust by more than 1 time quanta per bit.

The above implies up to 5% clock mismatch can be tolerated, but it's not that simple.  What if successive bits are the same value?  Then there isn't a transition to measure the start of new bits with.  CAN deals with this by using <i>bit stuffing</i>.  A bit of the opposite polarity is inserted whenever the previous 5 bits were the same polarity.  This means a receiver might only see an edge, and thereby be able to adjust itself to the bit phase, every 5 bits.  What sounded like a generous 5% mismatch budget now becomes just 1%.

There are some other things going on, so I'd not want to push it right to the edge with 1% clock mismatches.  If you control all the nodes on your CAN bus, you can have them tolerate more clock mismatch with careful time quanta and synchronization jump width configuration.  However, in the general case, you want to stay below 1%.  That means each node should be better than 0.5%.

In practice, this generally rules out internal RC oscillators, and pretty much requires a ceramic resonator at least.  Crystals are even more accurate, and pretty much any crystal will do accuracy-wise.

So to answer your question, no, don't use the internal oscillator that you show, at least not in the general case.  Fortunately, ceramic resonators are cheap and readily available.