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Q&A How to protect RF switches from ESD?

Currently there are $\boxed{\color{red}{\text{three}}}$ downvotes so maybe someone can explain why this has happened. Anyway, on to my downvoted answer: - You have "mentioned" the threat (the ESD ...

posted 3y ago by Andy aka‭  ·  edited 2y ago by Andy aka‭

Answer
#8: Post edited by user avatar Andy aka‭ · 2022-02-10T09:49:02Z (over 2 years ago)
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim" might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
  • **Currently there are** $\boxed{\color{red}{\text{three}}}$ **downvotes so maybe someone can explain why this has happened. Anyway, on to my downvoted answer: -**
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim" might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
#7: Post edited by user avatar ArtOfCode‭ · 2022-02-10T03:40:23Z (over 2 years ago)
  • **Currently there are** \$\boxed{\color{red}{\text{seven}}}\$ **downvotes so maybe someone can explain why this has happened. Anyway, on to my highly downvoted answer: -**
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim" might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim" might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
#6: Post edited by user avatar Andy aka‭ · 2022-02-09T13:49:49Z (over 2 years ago)
  • **Currently there are two downvotes so maybe someone can explain why this has happened. Anyway, on to my downvoted answer: -**
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim" might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
  • **Currently there are** \$\boxed{\color{red}{\text{seven}}}\$ **downvotes so maybe someone can explain why this has happened. Anyway, on to my highly downvoted answer: -**
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim" might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
#5: Post edited by user avatar Andy aka‭ · 2022-02-02T12:36:58Z (over 2 years ago)
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim" might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
  • **Currently there are two downvotes so maybe someone can explain why this has happened. Anyway, on to my downvoted answer: -**
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim" might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
#4: Post edited by user avatar Andy aka‭ · 2022-01-29T17:15:18Z (almost 3 years ago)
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim) might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim" might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
#3: Post edited by user avatar Andy aka‭ · 2022-01-29T15:23:07Z (almost 3 years ago)
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim) might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim) might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
  • Bottom line: use a sim to get you to the point of deciding whether you need to add a TVS. Then choose the TVS and yes, it needs to be low capacitance to avoid detuning the pi filter but, there might be half a chance you won't need one.
#2: Post edited by user avatar Andy aka‭ · 2022-01-29T09:17:00Z (almost 3 years ago)
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim) might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork.
  • You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter.
  • Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -
  • - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
  • - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
  • - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
  • - The peak input current due to ESD into your "victim) might be several tens of mA and that may be good enough to win-the-day
  • But, without component values and ESD source impedance and details of the potential victim, it's guesswork. If the simulation shows that your victim may be over-stressed then there is absolutely no point hoping that your real circuit will survive the day.
  • You'll also need a discharge resistor for the pi filter if you are doing a series of ESD pulses because you don't want the charging voltage to form a staircase that progressively rises higher during the testing.
#1: Initial revision by user avatar Andy aka‭ · 2022-01-29T09:12:59Z (almost 3 years ago) 
You have "mentioned" the threat (the ESD level) but, you haven't defined the peak voltage or current limit for the **potential victim**. Neither have you considered what the ESD pulse source impedance is and how the 8 kV is transformed to a significantly lower level by the capacitors in the pi filter. 

Simulation is very effective in these situations but, you need to model the ESD source (there are a few different types) and, you have to choose the one that your device is expected to be able to cope with. So, here are the mitigations: -

 - The ESD source (the threat) has output resistance and, it might be as low as a few hundred ohms or as high as 1.5 k&ohm;
 - The first capacitor in the pi filter will slow down the ESD pulse and provide voltage limiting over the duration of the pulse
 - The inductor and following capacitor may also have a beneficial effect or, may cause a nasty ringing voltage that might be worse than if they were not there. This is where simulation can help.
 - The peak input current due to ESD into your "victim) might be several tens of mA and that may be good enough to win-the-day

But, without component values and ESD source impedance and details of the potential victim, it's guesswork.