Communities

Writing
Writing
Codidact Meta
Codidact Meta
The Great Outdoors
The Great Outdoors
Photography & Video
Photography & Video
Scientific Speculation
Scientific Speculation
Cooking
Cooking
Electrical Engineering
Electrical Engineering
Judaism
Judaism
Languages & Linguistics
Languages & Linguistics
Software Development
Software Development
Mathematics
Mathematics
Christianity
Christianity
Code Golf
Code Golf
Music
Music
Physics
Physics
Linux Systems
Linux Systems
Power Users
Power Users
Tabletop RPGs
Tabletop RPGs
Community Proposals
Community Proposals
tag:snake search within a tag
answers:0 unanswered questions
user:xxxx search by author id
score:0.5 posts with 0.5+ score
"snake oil" exact phrase
votes:4 posts with 4+ votes
created:<1w created < 1 week ago
post_type:xxxx type of post
Search help
Notifications
Mark all as read See all your notifications »
Q&A

Post History

50%
+0 −0
Q&A What is the role of master clock speed on DAC

In protocol I2S we have 4 signal: 1.data 2.lrck/fck (frame synchronizer) 3.bck (bit clock) 4.mck/sck (master clock) Not really. IIS really only has 3 signals: bit data, bit clock, and left/right ...

posted 1y ago by Olin Lathrop‭

Answer
#1: Initial revision by user avatar Olin Lathrop‭ · 2023-03-30T16:49:50Z (about 1 year ago)
<blockquote>In protocol I2S we have 4 signal: 1.data 2.lrck/fck (frame synchronizer) 3.bck (bit clock) 4.mck/sck (master clock)</blockquote>

Not really.  IIS really only has 3 signals: bit data, bit clock, and left/right indication.  Take a look at the actual IIS protocol from NXP.

Some implementations do use a "master clock".  This is sometimes the l/r signal divided by 256 or somesuch.  If used, it tends to be for higher level synchronization.

It looks like your D/A expects plain IIS, and doesn't connect to any master clock if there is one.