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Q&A What is the role of master clock speed on DAC

In protocol I2S we have 4 signal: 1.data 2.lrck/fck (frame synchronizer) 3.bck (bit clock) 4.mck/sck (master clock) Not really. IIS really only has 3 signals: bit data, bit clock, and left/right ...

posted 1y ago by Olin Lathrop‭

Answer
#1: Initial revision by user avatar Olin Lathrop‭ · 2023-03-30T16:49:50Z (over 1 year ago)
<blockquote>In protocol I2S we have 4 signal: 1.data 2.lrck/fck (frame synchronizer) 3.bck (bit clock) 4.mck/sck (master clock)</blockquote>

Not really.  IIS really only has 3 signals: bit data, bit clock, and left/right indication.  Take a look at the actual IIS protocol from NXP.

Some implementations do use a "master clock".  This is sometimes the l/r signal divided by 256 or somesuch.  If used, it tends to be for higher level synchronization.

It looks like your D/A expects plain IIS, and doesn't connect to any master clock if there is one.