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Q&A Noise from oscillator on top layer to clock on bottom layer with VCC & GND layers between

What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer PCB stack-up looks like a compromise. Clock is a high speed signal, and so is SPI dependi...

posted 11mo ago by Nick Alexeev‭  ·  edited 11mo ago by Nick Alexeev‭

Answer
#5: Post edited by user avatar Nick Alexeev‭ · 2023-12-02T15:40:20Z (11 months ago)
  • What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer PCB stack-up looks like a compromise. Clock is a high speed signal, and so is SPI depending on the edge raise time. What works as reference layer for these signals?
  • A high speed signal should have a reference plane layer next to it. A GND plane layer serves as good reference plane in theory and in practice. A VCC plane layer can serve as a reference plane in theory, but there are practical hindrances. If you want to route a signal through a via from the bottom layer which uses VCC plane as a reference to the top layer which uses GND plane as a reference, then you have to connect the reference planes near the signal via. How would you connect the reference planes if they are at different potentials? You would connect them through a coupling capacitor. But then you have to have a lot of these coupling capacitors, which isn't convenient.
  • As a result of the above considerations, there are two non-compromised options for 4-layer PCB stack-ups.
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • If not enough real estate for high speed signals on the top layer:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - GND plane
  • 4 - high speed signals, sensitive signals
  • If you find yourself hard pressed to do a 4-layer PCB with two GND planes, then consider a 6-layer PCB:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • 5 - GND plane
  • 6 – high speed signals, sensitive signals
  • That's a common stack-up for a 6-layer PCB, although not the only good 6-layer stack-up.
  • What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer PCB stack-up looks like a compromise. Clock is a high speed signal, and so is SPI depending on the edge raise time. Clock and SPI are on different layers: top and bottom. What acts as reference layers for these signals?
  • A high speed signal should have a reference plane layer next to it. A GND plane layer serves as good reference plane in theory and in practice. A VCC plane layer can serve as a reference plane in theory, but there are practical hindrances. If you want to route a signal through a via from the bottom layer which uses VCC plane as a reference to the top layer which uses GND plane as a reference, then you have to connect the reference planes near the signal via. How would you connect the reference planes if they are at different potentials? You would connect them through a coupling capacitor. But then you have to have a lot of these coupling capacitors, which isn't convenient.
  • As a result of the above considerations, there are two non-compromised options for 4-layer PCB stack-ups.
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • If not enough real estate for high speed signals on the top layer:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - GND plane
  • 4 - high speed signals, sensitive signals
  • If you find yourself hard pressed to do a 4-layer PCB with two GND planes, then consider a 6-layer PCB:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • 5 - GND plane
  • 6 – high speed signals, sensitive signals
  • That's a common stack-up for a 6-layer PCB, although not the only good 6-layer stack-up.
#4: Post edited by user avatar Nick Alexeev‭ · 2023-12-01T17:58:40Z (11 months ago)
  • What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer PCB stack-up looks like a compromise.
  • A high speed signal should have a reference plane layer next to it. A GND plane layer serves as good reference plane in theory and in practice. A VCC plane layer can serve as a reference plane in theory, but there are practical hindrances. If you want to route a signal through a via from the bottom layer which uses VCC plane as a reference to the top layer which uses GND plane as a reference, then you have to connect the reference planes near the signal via. How would you connect the reference planes if they are at different potentials? You would connect them through a coupling capacitor. But then you have to have a lot of these coupling capacitors, which isn't convenient.
  • As a result of the above considerations, there are two non-compromised options for 4-layer PCB stack-ups.
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • If not enough real estate for high speed signals on the top layer:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - GND plane
  • 4 - high speed signals, sensitive signals
  • If you find yourself hard pressed to do a 4-layer PCB with two GND planes, then consider a 6-layer PCB:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • 5 - GND plane
  • 6 – high speed signals, sensitive signals
  • That's a common stack-up for a 6-layer PCB, although not the only good 6-layer stack-up.
  • What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer PCB stack-up looks like a compromise. Clock is a high speed signal, and so is SPI depending on the edge raise time. What works as reference layer for these signals?
  • A high speed signal should have a reference plane layer next to it. A GND plane layer serves as good reference plane in theory and in practice. A VCC plane layer can serve as a reference plane in theory, but there are practical hindrances. If you want to route a signal through a via from the bottom layer which uses VCC plane as a reference to the top layer which uses GND plane as a reference, then you have to connect the reference planes near the signal via. How would you connect the reference planes if they are at different potentials? You would connect them through a coupling capacitor. But then you have to have a lot of these coupling capacitors, which isn't convenient.
  • As a result of the above considerations, there are two non-compromised options for 4-layer PCB stack-ups.
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • If not enough real estate for high speed signals on the top layer:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - GND plane
  • 4 - high speed signals, sensitive signals
  • If you find yourself hard pressed to do a 4-layer PCB with two GND planes, then consider a 6-layer PCB:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • 5 - GND plane
  • 6 – high speed signals, sensitive signals
  • That's a common stack-up for a 6-layer PCB, although not the only good 6-layer stack-up.
#3: Post edited by user avatar Nick Alexeev‭ · 2023-12-01T17:50:34Z (11 months ago)
  • What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer PCB stack-up looks like a compromise.
  • A high speed signal should have a reference plane layer next to it. A GND plane layer serves as good reference plane in theory and in practice. A VCC plane layer can serve as a reference plane in theory, but there are practical hindrances. If you want to route a signal through a via from the bottom layer which uses VCC plane as a reference to the top layer which uses GND plane as a reference, then you have to connect the reference planes near the signal via. How would you connect the reference planes if they are at different potentials? You would connect them through a coupling capacitor. But then you have to have a lot of these coupling capacitors, which isn't convenient.
  • As a result of the above considerations, there are two non-compromised options for 4-layer PCB stack-ups.
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • If not enough real estate for high speed signals on the top layer:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - GND plane
  • 4 - high speed signals, sensitive signals
  • If you are hard pressed to do a 4-layer PCB with two GND planes, then consider a 6-layer PCB:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • 5 - GND plane
  • 6 – high speed signals, sensitive signals
  • What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer PCB stack-up looks like a compromise.
  • A high speed signal should have a reference plane layer next to it. A GND plane layer serves as good reference plane in theory and in practice. A VCC plane layer can serve as a reference plane in theory, but there are practical hindrances. If you want to route a signal through a via from the bottom layer which uses VCC plane as a reference to the top layer which uses GND plane as a reference, then you have to connect the reference planes near the signal via. How would you connect the reference planes if they are at different potentials? You would connect them through a coupling capacitor. But then you have to have a lot of these coupling capacitors, which isn't convenient.
  • As a result of the above considerations, there are two non-compromised options for 4-layer PCB stack-ups.
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • If not enough real estate for high speed signals on the top layer:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - GND plane
  • 4 - high speed signals, sensitive signals
  • If you find yourself hard pressed to do a 4-layer PCB with two GND planes, then consider a 6-layer PCB:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • 5 - GND plane
  • 6 – high speed signals, sensitive signals
  • That's a common stack-up for a 6-layer PCB, although not the only good 6-layer stack-up.
#2: Post edited by user avatar Nick Alexeev‭ · 2023-12-01T17:30:31Z (11 months ago)
  • What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer stack-up looks like a compromise.
  • A high speed signal should have a reference plane layer next to it. A GND plane layer serves as good reference plane in theory and in practice. A VCC plane layer can serve as a reference plane in theory, but there are practical hindrances. If you want to route a signal through a via from the bottom layer which uses VCC plane as a reference to the top layer which uses GND plane as a reference, then you have to connect the reference planes near the signal via. How would you connect the reference planes if they are at different potentials? You would connect them through a coupling capacitor. But then you have to have a lot of these coupling capacitors, which isn't convenient.
  • As a result of the above considerations, there are two non-compromised options for 4-layer PCB stack-ups.
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • If not enough real estate for high speed signals on the top layer:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - GND plane
  • 4 - high speed signals, sensitive signals
  • If you are hard pressed to do a 4-layer PCB with two GND planes, then consider a 6-layer PCB:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • 5 - GND plane
  • 6 – high speed signals, sensitive signals
  • What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer PCB stack-up looks like a compromise.
  • A high speed signal should have a reference plane layer next to it. A GND plane layer serves as good reference plane in theory and in practice. A VCC plane layer can serve as a reference plane in theory, but there are practical hindrances. If you want to route a signal through a via from the bottom layer which uses VCC plane as a reference to the top layer which uses GND plane as a reference, then you have to connect the reference planes near the signal via. How would you connect the reference planes if they are at different potentials? You would connect them through a coupling capacitor. But then you have to have a lot of these coupling capacitors, which isn't convenient.
  • As a result of the above considerations, there are two non-compromised options for 4-layer PCB stack-ups.
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • If not enough real estate for high speed signals on the top layer:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - GND plane
  • 4 - high speed signals, sensitive signals
  • If you are hard pressed to do a 4-layer PCB with two GND planes, then consider a 6-layer PCB:
  • 1 - high speed signals, sensitive signals
  • 2 - GND plane
  • 3 - VCC plane, other power distribution
  • 4 - low speed and non-sensitive signals
  • 5 - GND plane
  • 6 – high speed signals, sensitive signals
#1: Initial revision by user avatar Nick Alexeev‭ · 2023-12-01T17:29:21Z (11 months ago) 
What you are proposing may be okay (depending on other specifics of the design), but your proposed 4-layer stack-up looks like a compromise.

A high speed signal should have a reference plane layer next to it.  A GND plane layer serves as good reference plane in theory and in practice.  A VCC plane layer can serve as a reference plane in theory, but there are practical hindrances.  If you want to route a signal through a via from the bottom layer which uses VCC plane as a reference to the top layer which uses GND plane as a reference, then you have to connect the reference planes near the signal via.  How would you connect the reference planes if they are at different potentials?  You would connect them through a coupling capacitor.  But then you have to have a lot of these coupling capacitors, which isn't convenient.

As a result of the above considerations, there are two non-compromised options for 4-layer PCB stack-ups.

    1 - high speed signals, sensitive signals 
    2 - GND plane
    3 - VCC plane, other power distribution
    4 - low speed and non-sensitive signals

If not enough real estate for high speed signals on the top layer:

    1 - high speed signals, sensitive signals 
    2 - GND plane
    3 - GND plane
    4 - high speed signals, sensitive signals 

If you are hard pressed to do a 4-layer PCB with two GND planes, then consider a 6-layer PCB:

    1 - high speed signals, sensitive signals 
    2 - GND plane
    3 - VCC plane, other power distribution
    4 - low speed and non-sensitive signals
    5 - GND plane
    6 – high speed signals, sensitive signals