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Q&A Purpose of resistance between SENSE/FORCE line of power supply

This looks like the block diagram was done by a technical writer, not the designer. It is someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with...

posted 3mo ago by TonyStewart‭  ·  edited 3mo ago by TonyStewart‭

Answer
#6: Post edited by user avatar TonyStewart‭ · 2024-08-06T00:34:18Z (3 months ago)
  • This looks like the block diagram was done by a technical writer, not the designer. It is someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense (not accurate). It has no power supply.
  • Some old HP power supplies use resistance-controlled voltage for remote control. Perhaps this supply permits a single control input with ganged +/-
  • Vout or scaled outputs.
  • I would ignore this diagram and find a better way to understand the text. due to non-std. symbolic block diagram used.
  • FETs use gm to represent the inverse of RdsOn or the inverse of Beta with a gain in Amps/V as a small signal conductance gain. But you don't need to know this.
  • An error voltage controls a transistor resistance that feeds voltage from input to output and varies depending on the load and voltage-controlled conductance. A high gain error amplifier uses the difference between Vout and Vsense to power and regulate the output.
  • This looks like the block diagram was done by a technical writer, not the designer. It is someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense (not accurate). It has no power supply.
  • Some old HP power supplies use resistance-controlled voltage for remote control. Perhaps this supply permits a single control input with ganged +/-
  • Vout or scaled outputs.
  • I would ignore this diagram and find a better way to understand the text. due to non-std. symbolic block diagram used. The _feedback select_ has only one input(!). not well done.
  • FETs use gm to represent the inverse of RdsOn or the inverse of Beta with a gain in Amps/V as a small signal conductance gain. But you don't need to know this.
  • An error voltage controls a transistor resistance that feeds voltage from input to output and varies depending on the load and voltage-controlled conductance. A high gain error amplifier uses the difference between Vout and Vsense to power and regulate the output.
#5: Post edited by user avatar TonyStewart‭ · 2024-08-06T00:32:23Z (3 months ago)
  • It could be FET 3 terminal regulator with ganged OUT and ADJ (sense) pins. ha.
  • This looks like someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense (not accurate). It has no power supply.
  • Some old HP power supplies use resistance-controlled voltage for remote control. Perhaps this supply permits a single control with ganged +/-
  • Vout or scaled outputs.
  • I would ignore this diagram and find a better way to understand the text. due to non-std. symbolic block diagram used.
  • An error voltage controls a transistor resistance that feeds voltage from input to output and varies depending on the load and voltage-controlled conductance. A high gain error amplifier uses the difference between Vout and Vsense to power and regulate the output.
  • This looks like the block diagram was done by a technical writer, not the designer. It is someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense (not accurate). It has no power supply.
  • Some old HP power supplies use resistance-controlled voltage for remote control. Perhaps this supply permits a single control input with ganged +/-
  • Vout or scaled outputs.
  • I would ignore this diagram and find a better way to understand the text. due to non-std. symbolic block diagram used.
  • FETs use gm to represent the inverse of RdsOn or the inverse of Beta with a gain in Amps/V as a small signal conductance gain. But you don't need to know this.
  • An error voltage controls a transistor resistance that feeds voltage from input to output and varies depending on the load and voltage-controlled conductance. A high gain error amplifier uses the difference between Vout and Vsense to power and regulate the output.
#4: Post edited by user avatar TonyStewart‭ · 2024-08-06T00:28:48Z (3 months ago)
  • It could be FET 3 terminal regulator with ganged OUT and ADJ (sense) pins. ha.
  • This looks like someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense (not accurate). It has no power supply.
  • Some old HP power supplies use resistance-controlled voltage for remote control.
  • _I would ignore this diagram and find a better one. due to non-std. symbolic block diagram used._
  • Essentially an error voltage controls a transistor resistance which feeds voltage from input to output and varies depending on the load and voltage controlled conductance and a high gain error amplifier uses the difference between Vout and Vsense to power and regulate the output.
  • It could be FET 3 terminal regulator with ganged OUT and ADJ (sense) pins. ha.
  • This looks like someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense (not accurate). It has no power supply.
  • Some old HP power supplies use resistance-controlled voltage for remote control. Perhaps this supply permits a single control with ganged +/-
  • Vout or scaled outputs.
  • I would ignore this diagram and find a better way to understand the text. due to non-std. symbolic block diagram used.
  • An error voltage controls a transistor resistance that feeds voltage from input to output and varies depending on the load and voltage-controlled conductance. A high gain error amplifier uses the difference between Vout and Vsense to power and regulate the output.
#3: Post edited by user avatar TonyStewart‭ · 2024-08-06T00:26:11Z (3 months ago)
  • It could be FET 3 terminal regulator with ganged OUT and ADJ (sense) pins. ha.
  • This looks like someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense. It has no power supply.
  • _I would ignore this diagram and find a better one. due to non-std. symbolic block diagram used._
  • It could be FET 3 terminal regulator with ganged OUT and ADJ (sense) pins. ha.
  • This looks like someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense (not accurate). It has no power supply.
  • Some old HP power supplies use resistance-controlled voltage for remote control.
  • _I would ignore this diagram and find a better one. due to non-std. symbolic block diagram used._
  • Essentially an error voltage controls a transistor resistance which feeds voltage from input to output and varies depending on the load and voltage controlled conductance and a high gain error amplifier uses the difference between Vout and Vsense to power and regulate the output.
#2: Post edited by user avatar TonyStewart‭ · 2024-08-06T00:19:43Z (3 months ago)
  • It could be FET 3 terminal regulator with ganged OUT and ADJ (sense) pins. ha.
  • This looks like someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense.
  • _I would ignore this diagram and find a better one. due to non-std. symbolic block diagram used._
  • Transconductance gm could be a FET the inverse of Rds or Id = Beta*(Vgs-Vt)^2 / 2 for resistance-controlled current limiter. They ought to be matched FETs but if not quite, the lowest R will heat up and rise in R to hopefully share power. (PTC effect). This would be a pull-up current only and not a half-bridge driver or even a switched mode regulator.
  • It could be FET 3 terminal regulator with ganged OUT and ADJ (sense) pins. ha.
  • This looks like someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense. It has no power supply.
  • _I would ignore this diagram and find a better one. due to non-std. symbolic block diagram used._
#1: Initial revision by user avatar TonyStewart‭ · 2024-08-06T00:18:20Z (3 months ago) 
It could be FET 3 terminal regulator with ganged OUT and ADJ (sense) pins. ha.

 This looks like someone's conceptual misunderstanding of a linear servo with feedback relays and optional FET drivers with error amplifiers (and R5) between Vo and Sense. 

_I would ignore this diagram and find a better one. due to non-std. symbolic block diagram used._

Transconductance gm could be a FET the inverse of Rds or Id = Beta*(Vgs-Vt)^2 / 2 for resistance-controlled current limiter. They ought to be matched FETs but if not quite, the lowest R will heat up and rise in R to hopefully share power. (PTC effect).  This would be a pull-up current only and not a half-bridge driver or even a switched mode regulator.