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I see Andy has already given a good answer about part values and rolloff frequency.  I'll therefore try to explain why and what I usually do.

A digital circuit where signals are either slammed low or high can tolerate some noise on the supply.  For example, it would usually be OK to power logic gates from a 3.3 V supply produced by a buck regulator switching at 100 kHz.  The supply might ripple as much as 100 mVpp, but such levels won't usually bother the digital circuit.  Outputs will still be held solidly high or low, and inputs can still unambiguously distinguish between high and low.

Analog circuitry is different.  Noise from the power supply can end up on analog signals.  That's bad since the information they carry is the specific signal level.  For example, 100 mV uncertainty on a 3.3 V signal means the signal only carries 5 bits of information in its voltage.  If you could reliable measure it down to 1 mv, then it could carry over 11 bits of information.

Some analog chips, like most opamps, have deliberate circuitry to try to make the internal signal levels immune to power supply ripple.  However, this can only go so far.  This is quantified in something called the <i>power supply rejection</i> spec.  Active power supply rejection only works up to some frequency.  More of the power supply noise makes it onto signals as the frequency gets higher.

In the case of an A/D in a microcontroller, the digital output value really indicates what fraction the input was to the A/D reference voltage.  If that reference has noise on it, then the digital output will have noise on it proportionally.

To get the specs quoted in the datasheet for the micro's A/D, you have to hold AVdd and the A/D's reference steady.  The datasheet you quote dumbs this down to say to put a filter from Vdd to AVdd.  It doesn't really matter how you achieve clean AVdd, but it probably can't be too far off from the Vdd level.  Specifying a low pass filter is a simple way to do that without spending a lot of time writing the datasheet.

The low pass filter from Vdd to AVdd needs to:<ol>

<p><li>Squash the noise on Vdd so that AVdd is a clean level to the extent you care about.  For a 10 bit A/D for example, the noise should be less than 1 part in 1000, preferably half that.

<p><li>Keep the AVdd level close to the Vdd level.  Things can break internally, or at least not function correctly, when there is too much of an offset between the two.  The datasheet should give you AVdd limits relative to Vdd.

</p></ol>

The reason your 10 k&Omega; resistor is bad is because of point 2.  Only 100 &micro;A draw on AVdd would cause a whole volt offset.  That's probably too much, and also makes the AVdd level dependent on the AVdd current, which actually adds noise.

You should be able to see that the characteristics of the low pass filter from Vdd to AVdd depend on what noise is on Vdd, and how clean AVdd needs to be.  That varies from design to design, but usually Vdd is well regulated at DC.  Noise on Vdd usually comes from a switching power supply if one is used to make Vdd, and from current transients drawn by digital circuitry as it switches.  Both those are usually "high" frequency.  You are generally not worried about 1 kHz or even 10 kHz noise, but around 100 kHz and up.

In the end, it's usually impossible to know the particulars to design a specific filter.  What I do is something that should be "good enough" in most ordinary cases.  Here is a typical example from a real commercial product:

<img src="https://electrical.codidact.com/uploads/kt398oiik4rmz49pphm1xa6jdxmo">

The 5.7VIS input so the 3.3 V linear regulator comes from a flyback power supply across an isolation barrier.  It is somewhat noisy, and its level only regulated to within a few 100 mV.  The linear regulator (IC13) cleans it up a bit and produces a more steady and accurate 3.3 V for powering the digital section of the microcontroller (IC14).

L6 and C61 form the low pass filter to make AVdd even cleaner than Vdd.  L6 is a 0805 "chip inductor" of 950 nH and 600 m&Omega;.  With 600 m&Omega; series resistance, 10 mA of AVdd draw will cause only 6 mV of offset from Vdd.  The LC rolloff of 950 nH and 10 &micro;F is 52 kHz.  Note that the RC rolloff is even lower, at 27 kHz.  This filter will start attenuating noise at 30 kHz, and then attenuates more sharply at around 50 kHz.  By 100 kHz, there is significant attenuation from three poles, with a slope of 18 dB per octave at higher frequencies.

Sometimes I use two such LC in series and higher capacitance if there is more noise around or the signal needs to be extra clean.  The 1.2 &Omega; series resistance needs to be considered, but that's usually not a problem.