Post History
First: This is the stack-up. That's not a "stack-up". Board stackups show the layers, or what is sometimes referred to as the Z dimension. Your diagram shows the other two dimensions. The one ...
#2: Post edited
- First:
- <blockquote>This is the stack-up.</blockquote>
That's not a "stack-up". Board stackups show the layers, or what is sometimes referred to at the Z dimension. Your diagram shows the other two dimensions. The one thing it doesn't show is the stackup.- <blockquote>I am considering using one shared system reset signal for both devices</blockquote>
- That can be OK, but there are alternatives:<ol>
- <li>Have a single reset line to the processor. The processor then resets everything else when it wakes up, and releases it from reset when all the other state is ready for it.
<li>Have a single master reset, but don't tie it directly to the individual reset inputs. Have it turn on a transistor in each part separately, which then activates the actual reset inputs. This allows making the master reset whatever impedance you like, can be less susceptible to noise spikes, allows arbitrary polarity, and could even add hysteresis.- </ol>
- #1 would be my first plan unless there is a reason not to. It allows for greater flexibility in what is reset when, power-up sequencing, etc. Note that you can still do #2 for higher robustness. That depends on where and how far the external reset signal goes.
- <blockquote>Avdd from LDO, Dvdd from another LDO</blockquote>
This isn't necessarily wrong, but consider running the unregulated power, with separate LDOs on the other rigid part. That gets around some voltage drop in the power feed, and should result in cleaner regulated power at the remote end.
- First:
- <blockquote>This is the stack-up.</blockquote>
- That's not a "stack-up". Board stackups show the layers, or what is sometimes referred to as the Z dimension. Your diagram shows the other two dimensions. The one thing it doesn't show is the stackup.
- <blockquote>I am considering using one shared system reset signal for both devices</blockquote>
- That can be OK, but there are alternatives:<ol>
- <li>Have a single reset line to the processor. The processor then resets everything else when it wakes up, and releases it from reset when all the other state is ready for it.
- <li>Have a single master reset, but don't tie it directly to the individual reset inputs. Have it turn on a transistor in each part separately, which then activates the actual reset inputs. This allows making the master reset whatever impedance you like, can be less susceptible to noise spikes, allows arbitrary polarity, can be made to tolerate a wider voltage range, and could even add hysteresis.
- </ol>
- #1 would be my first plan unless there is a reason not to. It allows for greater flexibility in what is reset when, power-up sequencing, etc. Note that you can still do #2 for higher robustness. That depends on where and how far the external reset signal goes.
- <blockquote>Avdd from LDO, Dvdd from another LDO</blockquote>
- This isn't necessarily wrong, but consider running the unregulated power with separate LDOs on the other rigid part. That gets around some voltage drop in the power feed, and should result in cleaner regulated power at the remote end.
#1: Initial revision
First: <blockquote>This is the stack-up.</blockquote> That's not a "stack-up". Board stackups show the layers, or what is sometimes referred to at the Z dimension. Your diagram shows the other two dimensions. The one thing it doesn't show is the stackup. <blockquote>I am considering using one shared system reset signal for both devices</blockquote> That can be OK, but there are alternatives:<ol> <li>Have a single reset line to the processor. The processor then resets everything else when it wakes up, and releases it from reset when all the other state is ready for it. <li>Have a single master reset, but don't tie it directly to the individual reset inputs. Have it turn on a transistor in each part separately, which then activates the actual reset inputs. This allows making the master reset whatever impedance you like, can be less susceptible to noise spikes, allows arbitrary polarity, and could even add hysteresis. </ol> #1 would be my first plan unless there is a reason not to. It allows for greater flexibility in what is reset when, power-up sequencing, etc. Note that you can still do #2 for higher robustness. That depends on where and how far the external reset signal goes. <blockquote>Avdd from LDO, Dvdd from another LDO</blockquote> This isn't necessarily wrong, but consider running the unregulated power, with separate LDOs on the other rigid part. That gets around some voltage drop in the power feed, and should result in cleaner regulated power at the remote end.
