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Q&A

Comments on Can the via-in-pad (VIP) get damaged due to hand soldering during rework?

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Can the via-in-pad (VIP) get damaged due to hand soldering during rework?

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Background: I have already posted my question on electronics.stackexchange.com (EESE) and I did get an answer too. However, I am not satisfied by the explanation so far.

Literature survey done till now: I have gone through questions such as question 1 and question 2 on EESE. I have also gone through discussions on reddit such as reddit discussion 1 and reddit discussion 2. I found a few discussions on eev forum blog too such as eev discussion 1, eev discussion 2, and eev discussion 3.

From the literature survey I concluded:

  1. Much of the discussion on via-in-pad (VIP) was either about heat dissipation for ICs in BGA package or QFN package. Or, from the perspective of soldering, mainly reflow (what can possibly go wrong while soldering components on top of these vias). Not much discussion was about VIPs and hand soldering.
  2. People have mixed opinion about VIP. Some favour it and encourgae others to use it, while many oppose it and advice the same to others.
  3. The engineering community is clearly divided about VIPs.

My Question: To minimize the routing complexity on my PCB (2 different designs, each with 12 (+5) and 20 (+9) MOSFETs (+diodes) respectively along with their individual isolated power supplies), I intend to use the VIP (vias of 0.3 mm diameter) concept for laying down my PWM tracks. The final layout is not complete yet, however, I have shared a tentative idea of the layout approach that I have in my mind using the screenshot attached below:

Image_alt_text

I have attached the 3d image of the PCB layout too for reference.

PCB Top View:

Image_alt_text

PCB Bottom View:

Image_alt_text

The resistors $R\_G\_Q\_L1$ (gate resistor) and $R\_GPD\_Q\_L1$ (pull down resistor) will be of 2512 package. $R\_G\_Q\_L1$ is not optimized yet. Therefore, based on measurements, it will be changed as many times as needed, which implies the VIPs will also experience the same amount of heat as the pads themselves. I am a beginner to SMD soldering, in fact, I am not too good with through-hole soldering either. I am willing to learn and upskill myself though.

My questions to the experienced engineers here are:

  1. Is it okay for a beginner to work with VIPs?
  2. Can the via-in-pads get damaged due to the heat of the iron during repeated rework?
  3. Is via plugging (using plate over or epoxy or any other method) necessary for such a trivial application?
  4. At 0.3 mm via hole with hand soldering, apart from solder melting through the holes, what else may possibly go wrong in this approach?
  5. Any other advice/precaution that you think benefit me is also welcome.

I look forward to insightful and in depth answers and opinions from the experts.

History

2 comment threads

Is the via going to be filled? (4 comments)
Try to make your question more stand-alone here. (2 comments)
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Without the images or information elsewhere not in this question, it's hard to understand what you are trying to do. I can therefore only discuss the topic generally.

It seems you are asking about issues related to having a via directly within an SMD pad.

First, why do you want to do that? Is it for higher board density? For greater heat transfer from the part? Something else? To decide whether a solution is "good" requires knowing what criteria "good" will be judged against.

0.3 mm is only 12 mil, which is a very small via. Most board houses will charge extra for something that small. Unless you have a very dense design, sticking with 20 mil (0.5 mm) is a good design rule. That is usually just above the extra-small limit for vias for normal board houses.

I wouldn't put vias in pads for small SMD parts. For example, while an 0805 resistor can have pads large enough for a small via inside them, I'd worry about uneven heating and possibly uneven surface tension of the molten solder pulling the part away from its intended position.

Larger parts, like a 64 pin TQFP for example, might be able to handle the asymmetric surface tension, but have pads too small to support vias.

That leaves large parts with large pads where vias in the pad make any sense, like in the collector pad of DPAK transistor for example. I've never done that, but I don't see any major reasons not too.

Definitely consider the manufacturing process. Have a discussion with your assembly house first. Consider that the solder paste stencil will need to be open over the via, because it is surrounded by the pad that will need solder paste applied to it. That means paste will be forced down the via hole during the stencil process. That could be a problem, or maybe not. Again, talk to your assembly house.

Once the part is placed onto the pad, the pin is wetted with the solder paste, which should cause normal soldering on the pad where there isn't the via hole. That should be fine in most cases. Of course for high-current designs you need to make sure that there is sufficient pad area, and that the via diameter is large enough for whatever current will go thru the via.

During soldering, there again could be a problem because the solder on the pads with vias may melt at a different time than the solder on normal SMD pads. That isn't by itself a problem, but you have to consider how the part is pulled by solder surface tension on the solid pads while not being balanced by the pads with holes in them.

I have never done this and therefore never looked at this in depth. My reaction is that it should be doable, but there are some issues you need to consider carefully when doing it.

Again, though, it would help to know what problem vias within SMD pads is intended to solve.

It is only to make the routing easier. No, my designs are not high density.
I intend to stick to 2512s mainly, and if it is necessary, I will not go below 1206 packages.

If the point is to make routing easier, then smaller parts will have greater return than putting vias inside instead of next to some pads. There are many more available parts in 0805 and smaller, and 0805 is still easy to work with manually. That's what I use unless there are specific reasons not to.

Only use large parts, like 2512 and 1206, when you actually need the physical size. That could be because of needing higher power dissipation, more capacitance at a particular voltage, or higher maximum voltage. Some standards, like Intrinsic Safety and medical, may also require minimum spacings that only larger parts can meet.

Well, this project is only for my thesis. No product development. I alone would do the soldering or any kind of rework. No reflow soldering.

In that case, I'd stay away from vias inside pads. The extra heat sinking to the other side of the via will make manual soldering difficult. You can only heat the edge of the pad, but the via will be sucking away heat right in the middle of the pad.

Unless you've got experience with vias inside pads (which I don't) and know it will be OK, I'd stay away from it, especially for hand soldering.

History

1 comment thread

My explanation for the points/concerns raised by you. (3 comments)
My explanation for the points/concerns raised by you.
ankit.kumar‭ wrote 2 months ago · edited 2 months ago

Thank you for sharing your thoughts, Sir Olin Lathrop‭. My explanation to the points raised by you:

First, why do you want to do that? Is it for higher board density?

It is only to make the routing easier. No, my designs are not high density. The through hole heat sinks are taking up a lot of space because of which routing is getting difficult. Not for heat transfer or any other thing.

0.3 mm is only 12 mil, which is a very small via.

I have been able to find some websites that do 0.3 mm without any extra cost.

I wouldn't put vias in pads for small SMD parts.

VIPs would be placed on 2512 resistors, capacitors and ICs. Also, I am working with TO-247 and 2512 mainly. Only passives and at the most TO-247s will be replaced as per requirements. No rework on the ICs.

Consider that the solder paste stencil will need to be open over the via

Well, this project is only for my thesis. No product development. I alone would do the soldering or any kind of rework. No reflow soldering.

ankit.kumar‭ wrote 2 months ago

Of course for high-current designs you need to make sure that there is sufficient pad area

PWM tracks should not take too much current. Everywhere else I am using copper pours.

During soldering, there again could be a problem because the solder on the pads with vias may melt at a different time than the solder on normal SMD pads. That isn't by itself a problem, but you have to consider how the part is pulled by solder surface tension on the solid pads while not being balanced by the pads with holes in them.

I intend to stick to 2512s mainly, and if it is necessary, I will not go below 1206 packages.

Again, though, it would help to know what problem vias within SMD pads is intended to solve.

It is only to reduce the routing complexity. and to minimize the loop inductance as much as possible.

ankit.kumar‭ wrote about 2 months ago

Hello Sir Olin Lathrop‭,

There are many more available parts in 0805 and smaller, and 0805 is still easy to work with manually. That's what I use unless there are specific reasons not to.

Can 0805 packages be used for gate resistor and snubber circuits, sir? There's a pulsed power rating associated with gate resistors which should be met to be on a safe side. 2512's pulsed power rating is much more than 0805's. Am I correct?

Only use large parts, like 2512 and 1206, when you actually need the physical size. That could be because of needing higher power dissipation, more capacitance at a particular voltage, or higher maximum voltage.

I am going with 2512 package because I want to ensure:

  1. The gate resistors can handle the pulsed power rating requirement
  2. The R-C snubbers can handle 1W (max) when they damp the ringing across the MOSFETs and Diodes in the power circuit.