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Q&A

What is the purpose of paralleling capacitors on the input/output of a power converter?

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In the design of a power converter, picking the appropriate capacitors for the input and output of the converter is quite important. It is relatively easy to calculate the necessary values for a given application.

However, in many datasheets it is suggested to use a capacitor network instead of a single capacitor. This is achieved by taking capacitors of a lower value and paralleling them until the desired value is achieved. Often, electrolytic and ceramic capacitors will be combined. I can think of a few reasons why:

  • Lower ESR (as the resistances are now paralleled).
  • Increased reliability: capacitors are a very likely source of failure for a power converter, if we have a few in parallel then we can survive one or two being blown out.

Are those valid reasons to have several capacitors on the input/output of a power converter? What other reasons are there?

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Lower ESR can sometimes be a reason, as you say. However, most of the time the advantage is a wider frequency range over which the combined capacitor has low impedance or low dissipation.

The frequency capability of a capacitor depends on its type, and generally reduces with higher capacitance. Ceramics work to higher frequencies than electrolytics, for example, at the same capacitance. However, electrolytics have much more capacitance at the same size. Paralleling an electrolytic with a ceramic is one way to get low impedance across a larger frequency range.

Even within a type, there is tradeoff with capacitance. For example, here is a snippet from the spec sheet of a 10 µF 10 V ceramic cap with X7R ceramic in 0805 package:

Note that it stops acting as a capacitor at about 1 MHz. Now compare that to a 100 nF capacitor:

This one is good to just under 10 MHz.

In power conversion, you usually need significant capacitance on the output. This often can't be achieved with types that have genarlly nice properties, like ceramics. Instead, you use electrolytic for the bulk capacitance. That works up to some frequency, above which the ESR gets in the way, or the ripple current capability is exceeded. At high frequencies, you don't need as much capacitance to provide low impedance. A few ceramic capacitors in parallel can handle the ripple current and provide low impedance at the high frequencies. There may be multiple ceramic capacitance values to cover the full desired frequency range.

This phenomenon is also the reason you use ceramic caps for power supply bypassing of individual chips. The leads back to the power supply can handle the low frequency case. The bypass cap is only to shunt the high frequency currents generated by the chip. A 10 µF electrolytic would be useless because it's not a capacitor anymore at those frequencies. Instead, you use a 1 µF or 100 nF ceramic cap.

I once specified a particular model of 100 pF capacitor for use in a RF application because it had lower impedance at the RF frequency than larger caps. That was because those larger caps weren't really capacitors anymore at that frequency.

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