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Q&A PNP Darlington pair as a current limiter

I am trying to analyse what is controlling the load current in the below Darlington configuration. Is it the base current of transistor Q3 which is controlling current through R14 / emitter curr...

1 answer · posted 3y ago by kadamrohan16‭ · edited 1y ago by Lorenzo Donati‭

Question power-supply BJT circuit-analysis

#7: Post edited by

Lorenzo Donati‭ · 2023-08-09T20:39:27Z (over 1 year ago)
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power-supply Analog BJT

power-supply BJT circuit-analysis

#6: Post edited by

Lorenzo Donati‭ · 2023-07-28T15:38:08Z (over 1 year ago)
Removed redundant tag.

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power-supply Analog transistor BJT

power-supply Analog BJT

#5: Post edited by

kadamrohan16‭ · 2022-02-04T15:24:24Z (almost 3 years ago)

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I am trying to analyse what is controlling the load current in the below Darlington configuration.
1. Is it the base current of transistor Q3 which is controlling current through R14 / emitter current of Q2?
![Image alt text](https://electrical.codidact.com/uploads/bCTSmFxfKefvPJWEng5zhwdy)
2. If it is, then is the maximum permissible load current is calculated by Ic(Q3) * Q1 beta * Q2 beta ?
3. From light load to maximum load, will all three transistor stay in the active region? For light loads , Q2 may get into saturation region I suppose.
EDIT :
~~Alternate circuit to acheive the same functionality~~
![Image alt text](https://electrical.codidact.com/uploads/MNb4uPyDpdpTEo6rEn7QGVQp)
are there any drawbacks to use this circuit ?

I am trying to analyse what is controlling the load current in the below Darlington configuration.
1. Is it the base current of transistor Q3 which is controlling current through R14 / emitter current of Q2?
![Image alt text](https://electrical.codidact.com/uploads/bCTSmFxfKefvPJWEng5zhwdy)
2. If it is, then is the maximum permissible load current is calculated by Ic(Q3) * Q1 beta * Q2 beta ?
3. From light load to maximum load, will all three transistor stay in the active region? For light loads , Q2 may get into saturation region I suppose.
EDIT :
Alternate circuit to achieve the same functionality
![Image alt text](https://electrical.codidact.com/uploads/MNb4uPyDpdpTEo6rEn7QGVQp)
are there any drawbacks to use this circuit ?

#4: Post edited by

kadamrohan16‭ · 2022-02-04T15:23:48Z (almost 3 years ago)

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I am trying to analyse what is controlling the load current in the below Darlington configuration.
1. Is it the base current of transistor Q3 which is controlling current through R14 / emitter current of Q2?
![Image alt text](https://electrical.codidact.com/uploads/bCTSmFxfKefvPJWEng5zhwdy)
2. If it is, then is the maximum permissible load current is calculated by Ic(Q3) * Q1 beta * Q2 beta ?
~~3. From light load to maximum load, will all three transistor stay in the active region? For light loads , Q2 may get into saturation region I suppose.~~

I am trying to analyse what is controlling the load current in the below Darlington configuration.
1. Is it the base current of transistor Q3 which is controlling current through R14 / emitter current of Q2?
![Image alt text](https://electrical.codidact.com/uploads/bCTSmFxfKefvPJWEng5zhwdy)
2. If it is, then is the maximum permissible load current is calculated by Ic(Q3) * Q1 beta * Q2 beta ?
3. From light load to maximum load, will all three transistor stay in the active region? For light loads , Q2 may get into saturation region I suppose.
EDIT :
Alternate circuit to acheive the same functionality
![Image alt text](https://electrical.codidact.com/uploads/MNb4uPyDpdpTEo6rEn7QGVQp)
are there any drawbacks to use this circuit ?

#3: Post edited by

kadamrohan16‭ · 2022-02-03T18:45:40Z (almost 3 years ago)

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I am trying to analyse what is controlling the load current in the below Darlington configuration.
1. Is it the base current of transistor Q3 which is controlling current through R14 / emitter current of Q2?
2. If it is, then is the maximum permissible load current is calculated by Ic(Q3) * Q1 beta * Q2 beta ?
~~![Image alt text](https://electrical.codidact.com/uploads/VqTLstSqeeSRsynqwUUAGttC)~~
3. From light load to maximum load, will all three transistor stay in the active region? For light loads , Q2 may get into saturation region I suppose.

I am trying to analyse what is controlling the load current in the below Darlington configuration.
1. Is it the base current of transistor Q3 which is controlling current through R14 / emitter current of Q2?
![Image alt text](https://electrical.codidact.com/uploads/bCTSmFxfKefvPJWEng5zhwdy)
2. If it is, then is the maximum permissible load current is calculated by Ic(Q3) * Q1 beta * Q2 beta ?
3. From light load to maximum load, will all three transistor stay in the active region? For light loads , Q2 may get into saturation region I suppose.

#2: Post edited by

Olin Lathrop‭ · 2022-02-03T13:14:46Z (almost 3 years ago)

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~~**PNP Darlington pair as a current limiter**~~

PNP Darlington pair as a current limiter

#1: Initial revision by

kadamrohan16‭ · 2022-02-03T10:01:19Z (almost 3 years ago)

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**PNP Darlington pair as a current limiter**

I am trying to analyse what is controlling the load current in the below Darlington configuration.

1. Is it the base current of transistor Q3 which is controlling current through R14 / emitter current of Q2?

2. If it is, then is the maximum permissible load current is calculated by Ic(Q3) * Q1 beta * Q2 beta ?
![Image alt text](https://electrical.codidact.com/uploads/VqTLstSqeeSRsynqwUUAGttC)
3. From light load to maximum load, will all three transistor stay in the active region? For light loads , Q2 may get into saturation region  I suppose.

power-supply Analog transistor BJT

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