Communities

Writing
Writing
Codidact Meta
Codidact Meta
The Great Outdoors
The Great Outdoors
Photography & Video
Photography & Video
Scientific Speculation
Scientific Speculation
Cooking
Cooking
Electrical Engineering
Electrical Engineering
Judaism
Judaism
Languages & Linguistics
Languages & Linguistics
Software Development
Software Development
Mathematics
Mathematics
Christianity
Christianity
Code Golf
Code Golf
Music
Music
Physics
Physics
Linux Systems
Linux Systems
Power Users
Power Users
Tabletop RPGs
Tabletop RPGs
Community Proposals
Community Proposals
tag:snake search within a tag
answers:0 unanswered questions
user:xxxx search by author id
score:0.5 posts with 0.5+ score
"snake oil" exact phrase
votes:4 posts with 4+ votes
created:<1w created < 1 week ago
post_type:xxxx type of post
Search help
Notifications
Mark all as read See all your notifications »
Q&A

Post History

71%
+3 −0
Q&A What fabrication process is being used for jellybean parts

I want to know why the top-of-the-line CPUs and GPUs from Intel, NVIDIA, and AMD are all bragging about the fabrication process (7nm and 5nm) and trying to be consistently smaller. At the same tim...

3 answers  ·  posted 1y ago by dekker‭  ·  last activity 1y ago by TonyStewart‭

#1: Initial revision by user avatar dekker‭ · 2023-11-30T17:04:33Z (about 1 year ago)
What fabrication process is being used for jellybean parts
I want to know why the top-of-the-line CPUs and GPUs from 
Intel, NVIDIA, and AMD are all bragging about the fabrication process (7nm and 5nm) and trying to be consistently smaller. At the same time, on the other side of the industry, the everyday utility ICs like power management ICs, boos or buck converters, etc, never mention which fabrication process are they using?

Let's take some relative Ti and AD chips as examples:
https://www.ti.com/product/TPS610333
https://www.analog.com/en/products/ltc7880.html

Is it possible to find out what fabrication process, wafer size, etc these jellybean parts are made of? Is it at all important?
Is it even possible or makes sense to make such chips in cutting-edge 4nm and 5nm processes?