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MOSFET drain current ringing in saturation region

I benchtested below 0.7A constant current source circuit and observed few cycles of oscillation on drain current. With the help of bode plot analysis , I have managed to reduce the oscillations on drain current by increasing the phase margin to some acceptable level.

![Constant current circuit LTspice simulation](https://electrical.codidact.com/uploads/v8dt8t5w4zyrdwxi5rtyycjwmu3e)

While doing the analysis , I observed in Ltspice and on the test bench that the amplitude of drain current oscillations and cycles increase as the drain voltage gets reduced from 30V to 7V.

![Drain current @30V Drain voltage](https://electrical.codidact.com/uploads/eh5qevn88lbc5uxwahwn15w0tm7q)
ripple_drain_current_max@ 30V_Vd=78mA
![Drain current @7V Drain voltage](https://electrical.codidact.com/uploads/ovpsoc1sq4619m0d121q5ay5vd40)
ripple_drain_current_max@ 7V_Vd=176mA

feedback element between drain terminal and gate terminal is miller capacitance. Is miller capacitance value getting reduced due to the application of higher voltage across it like it does in ceramic caps ( Vdg = 30V -Vg) and hence stores lesser charge compared to 7V ? and due to lesser stored charge , it gets dicharged in fewer cycles ?

looking forward to the comments on this .

Thanks