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A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of ...
#5: Post edited
by
Carl
·
2025-09-01T11:39:54Z (about 1 year ago)
- A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of its pins need to be pulled HIGH, the waveform for the current that the IC draws from the supply looks almost like a step function (a signal that contains all frequencies). Because the trace that connects the supply voltage to the IC's power pins have inductance, a sudden change in current leads to spikes in the supply voltage. To mitigate these spikes, bypass/decoupling capacitors to ground are placed next to the power pin.
The effect of this is shown in the two simulations below: one where the cap is placed "far" away from the controller's power pin, and the other where the cap is placed "closer" to the pin. The microcontroller is modelled as a pulsing current source, and the bypass capacitor is set to 100 nF. The blue curve is the drawn current; the red curve is the voltage at the IC's power pin.- The simulations show that it is a good idea to place the caps as close as possible.
- 
- 
- Usually in datasheets they show multiple bypass capacitors in parallel with the power pin, and many times not with the same value. The argument for doing this seems to be that capacitors with different values and sizes have different frequency responses, so choosing a range of values should "cover all cases". But when I simulate this with simple parasitic capacitor models with values taken from real vendors, I find that using different valued capacitors make things worse, compared to parallel multiple capacitors of the same value:
- 
- 
- The amplitude of the spikes is greater in the second simulation.
- Is using different valued bypass capacitors just a "cargo cult"?
- A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of its pins need to be pulled HIGH, the waveform for the current that the IC draws from the supply looks almost like a step function (a signal that contains all frequencies). Because the trace that connects the supply voltage to the IC's power pins have inductance, a sudden change in current leads to spikes in the supply voltage. To mitigate these spikes, bypass/decoupling capacitors to ground are placed next to the power pin.
- The effect of this is shown in the two simulations below: one where the cap is placed "far" away from the controller's power pin, and the other where the cap is placed "closer" to the pin. Ls1 is the inductance from supply to bypass cap, and Ls2 is the inductance from bypass cap to the IC's power pin. The microcontroller is modelled as a pulsing current source, and the bypass capacitor is set to 100 nF. The blue curve is the drawn current; the red curve is the voltage at the IC's power pin.
- The simulations show that it is a good idea to place the caps as close as possible.
- 
- 
- Usually in datasheets they show multiple bypass capacitors in parallel with the power pin, and many times not with the same value. The argument for doing this seems to be that capacitors with different values and sizes have different frequency responses, so choosing a range of values should "cover all cases". But when I simulate this with simple parasitic capacitor models with values taken from real vendors, I find that using different valued capacitors make things worse, compared to parallel multiple capacitors of the same value:
- 
- 
- The amplitude of the spikes is greater in the second simulation.
- Is using different valued bypass capacitors just a "cargo cult"?
#4: Post edited
by
Carl
·
2025-09-01T11:26:04Z (about 1 year ago)
Using different valued bypass capacitors is a cargo cult? Should I do it because that's what everybody else does?
- Is using different valued bypass capacitors a cargo cult? Should I do it because that's what everybody else does?
- A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of its pins need to be pulled HIGH, the waveform for the current that the IC draws from the supply looks almost like a step function (a signal that contains all frequencies). Because the trace that connects the supply voltage to the IC's power pins have inductance, a sudden change in current leads to spikes in the supply voltage. To mitigate these spikes, bypass/decoupling capacitors to ground are placed next to the power pin.
The effect of this is shown in the two simulations below: one where the cap is placed "far" away from the controller's power pin, and the other where the cap is placed "closer" to the pin. The microcontroller is modelled as a pulsing current source, and the bypass capacitor is set to 100 nF.- The simulations show that it is a good idea to place the caps as close as possible.
- 
- 
- Usually in datasheets they show multiple bypass capacitors in parallel with the power pin, and many times not with the same value. The argument for doing this seems to be that capacitors with different values and sizes have different frequency responses, so choosing a range of values should "cover all cases". But when I simulate this with simple parasitic capacitor models with values taken from real vendors, I find that using different valued capacitors make things worse, compared to parallel multiple capacitors of the same value:
- 
- 
- The amplitude of the spikes is greater in the second simulation.
- Is using different valued bypass capacitors just a "cargo cult"?
- A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of its pins need to be pulled HIGH, the waveform for the current that the IC draws from the supply looks almost like a step function (a signal that contains all frequencies). Because the trace that connects the supply voltage to the IC's power pins have inductance, a sudden change in current leads to spikes in the supply voltage. To mitigate these spikes, bypass/decoupling capacitors to ground are placed next to the power pin.
- The effect of this is shown in the two simulations below: one where the cap is placed "far" away from the controller's power pin, and the other where the cap is placed "closer" to the pin. The microcontroller is modelled as a pulsing current source, and the bypass capacitor is set to 100 nF. The blue curve is the drawn current; the red curve is the voltage at the IC's power pin.
- The simulations show that it is a good idea to place the caps as close as possible.
- 
- 
- Usually in datasheets they show multiple bypass capacitors in parallel with the power pin, and many times not with the same value. The argument for doing this seems to be that capacitors with different values and sizes have different frequency responses, so choosing a range of values should "cover all cases". But when I simulate this with simple parasitic capacitor models with values taken from real vendors, I find that using different valued capacitors make things worse, compared to parallel multiple capacitors of the same value:
- 
- 
- The amplitude of the spikes is greater in the second simulation.
- Is using different valued bypass capacitors just a "cargo cult"?
#3: Post edited
by
Carl
·
2025-09-01T11:25:05Z (about 1 year ago)
- A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of its pins need to be pulled HIGH, the waveform for the current that the IC draws from the supply looks almost like a step function (a signal that contains all frequencies). Because the trace that connects the supply voltage to the IC's power pins have inductance, a sudden change in current leads to spikes in the supply voltage. To mitigate these spikes, bypass/decoupling capacitors to ground are placed next to the power pin.
- The effect of this is shown in the two simulations below: one where the cap is placed "far" away from the controller's power pin, and the other where the cap is placed "closer" to the pin. The microcontroller is modelled as a pulsing current source, and the bypass capacitor is set to 100 nF.
- The simulations show that it is a good idea to place the caps as close as possible.
- 
- 
- Usually in datasheets they show multiple bypass capacitors in parallel with the power pin, and many times not with the same value. The argument for doing this seems to be that capacitors with different values and sizes have different frequency responses, so choosing a range of values should "cover all cases". But when I simulate this with simple parasitic capacitor models with values taken from real vendors, I find that using different valued capacitors make things worse, compared to parallel multiple capacitors of the same value:
- 
- 
The amplitude of the spikes are greater in the second simulation.- Is using different valued bypass capacitors just a "cargo cult"?
- A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of its pins need to be pulled HIGH, the waveform for the current that the IC draws from the supply looks almost like a step function (a signal that contains all frequencies). Because the trace that connects the supply voltage to the IC's power pins have inductance, a sudden change in current leads to spikes in the supply voltage. To mitigate these spikes, bypass/decoupling capacitors to ground are placed next to the power pin.
- The effect of this is shown in the two simulations below: one where the cap is placed "far" away from the controller's power pin, and the other where the cap is placed "closer" to the pin. The microcontroller is modelled as a pulsing current source, and the bypass capacitor is set to 100 nF.
- The simulations show that it is a good idea to place the caps as close as possible.
- 
- 
- Usually in datasheets they show multiple bypass capacitors in parallel with the power pin, and many times not with the same value. The argument for doing this seems to be that capacitors with different values and sizes have different frequency responses, so choosing a range of values should "cover all cases". But when I simulate this with simple parasitic capacitor models with values taken from real vendors, I find that using different valued capacitors make things worse, compared to parallel multiple capacitors of the same value:
- 
- 
- The amplitude of the spikes is greater in the second simulation.
- Is using different valued bypass capacitors just a "cargo cult"?
#2: Post edited
by
Carl
·
2025-09-01T11:24:22Z (about 1 year ago)
A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of its pins need to be pulled HIGH, the waveform for the current that the IC draws from the supply looks almost like a step function (a signal that contains all frequencies). Because the trace that connects the supply voltage to the IC's power pins have inductance, a sudden change in current leads to spikes in the supply voltage. To mitigate these spikes, bypass/decoupling capacitors to ground are placed next to the power pin. The effect of this is shown in the two simulations below: one where the cap is placed "far" away from the controller's power pin, and the other where the cap is placed "closer" to the pin. The simulations show that it is a good idea to place the caps as close as possible.- 
- 
- Usually in datasheets they show multiple bypass capacitors in parallel with the power pin, and many times not with the same value. The argument for doing this seems to be that capacitors with different values and sizes have different frequency responses, so choosing a range of values should "cover all cases". But when I simulate this with simple parasitic capacitor models with values taken from real vendors, I find that using different valued capacitors make things worse, compared to parallel multiple capacitors of the same value:
- 
- 
- The amplitude of the spikes are greater in the second simulation.
- Is using different valued bypass capacitors just a "cargo cult"?
- A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of its pins need to be pulled HIGH, the waveform for the current that the IC draws from the supply looks almost like a step function (a signal that contains all frequencies). Because the trace that connects the supply voltage to the IC's power pins have inductance, a sudden change in current leads to spikes in the supply voltage. To mitigate these spikes, bypass/decoupling capacitors to ground are placed next to the power pin.
- The effect of this is shown in the two simulations below: one where the cap is placed "far" away from the controller's power pin, and the other where the cap is placed "closer" to the pin. The microcontroller is modelled as a pulsing current source, and the bypass capacitor is set to 100 nF.
- The simulations show that it is a good idea to place the caps as close as possible.
- 
- 
- Usually in datasheets they show multiple bypass capacitors in parallel with the power pin, and many times not with the same value. The argument for doing this seems to be that capacitors with different values and sizes have different frequency responses, so choosing a range of values should "cover all cases". But when I simulate this with simple parasitic capacitor models with values taken from real vendors, I find that using different valued capacitors make things worse, compared to parallel multiple capacitors of the same value:
- 
- 
- The amplitude of the spikes are greater in the second simulation.
- Is using different valued bypass capacitors just a "cargo cult"?
#1: Initial revision
by
Carl
·
2025-09-01T11:22:49Z (about 1 year ago)
Using different valued bypass capacitors is a cargo cult? Should I do it because that's what everybody else does?
A microcontroller can be modelled simplistically as a broad band current source/sink. For example, when the microcontroller wakes up from sleep mode and goes into an application mode where many of its pins need to be pulled HIGH, the waveform for the current that the IC draws from the supply looks almost like a step function (a signal that contains all frequencies). Because the trace that connects the supply voltage to the IC's power pins have inductance, a sudden change in current leads to spikes in the supply voltage. To mitigate these spikes, bypass/decoupling capacitors to ground are placed next to the power pin. The effect of this is shown in the two simulations below: one where the cap is placed "far" away from the controller's power pin, and the other where the cap is placed "closer" to the pin. The simulations show that it is a good idea to place the caps as close as possible.   Usually in datasheets they show multiple bypass capacitors in parallel with the power pin, and many times not with the same value. The argument for doing this seems to be that capacitors with different values and sizes have different frequency responses, so choosing a range of values should "cover all cases". But when I simulate this with simple parasitic capacitor models with values taken from real vendors, I find that using different valued capacitors make things worse, compared to parallel multiple capacitors of the same value:   The amplitude of the spikes are greater in the second simulation. Is using different valued bypass capacitors just a "cargo cult"?