Mitigating Reference Voltage Ripple in 12-bit ADCs Powered by Switching Regulators [closed]
Closed as unclear by Olin Lathrop on Nov 8, 2025 at 15:53
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I am using a 12-bit ADC with its reference voltage powered by a switching regulator that introduces approximately 33 mV Peak to Peak ripple on the reference line and ripple frequency is 1.7 Khz. Will calibrating the ADC effectively mitigate the effects of this ripple?
Additionally, are there any firmware-based techniques that can compensate for or nullify reference voltage ripple at the ADC?
I am using a Buck-Boost Converter module from Sparkfun.The schematic is given below.
Before doing the measurement I placed two 0.1 uF capacitors in parallel with two 22 uF present in the board. My oscilloscope wave from is given below.I a using this oscilloscope first time.I believe my settings are correct.(Coupling AC,BW--> 20 MHz).
I am using the below probe.
I did one more experiment after that. I removed the two 0.1uF placed in parallel with the 22uF. Then I kept an RC filter at the output R= 330K and C = 470pF. The output of the RC filter output is given below. Here I can see that the ripple is reduced.Peak to pkeak ripple now became 16.2 mV and ripple frequency is 1.55 Khz.
Still my ripple voltage is very high. My ADC is 12 bit and reference voltage is 3.3V.
Can you suggest some methods to reduce ripple on this board?.
1 answer
It's suboptimal.
You could try to greatly oversample and average it out, but it would raise questions about aliasing.
Depending on how fast the ADC is sampled, you might get aliasing of the 10mVac into what will look like a lower frequency.
You could try to sync the ADC with the DC/DC, which would alias the error into DC, and then try to calibrate away the effects of that. Of course the ripple might vary per load etc. Obtaining that sync likely involves changing the circuit, in which case you should just filter the noisy reference node instead.

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