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Requirement: I have to charge a bulky DC link capacitor (3000 µF, 400V) of a photovoltaic (PV) inverter which will be powered using an electronic PV emulator for my research thesis. I am trying to...
#1: Initial revision
PMOS based pre-charging and voltage soft start circuit using LTspice simulations for hardware implementation
**Requirement:** I have to charge a bulky DC link capacitor (3000 µF, 400V) of a photovoltaic (PV) inverter which will be powered using an electronic PV emulator for my research thesis. I am trying to limit the inrush current and ramp up the voltage in a soft-start manner by using a pre-charging circuit centred around a PMOS-FET. **Background and initial attempts:** I am following [this application note by onsemi](https://www.onsemi.com/pub/Collateral/AND9093-D.PDF). A plethora of questions already exist on electronics.stackexchange.com related to pre-charging circuits such as [this](https://electronics.stackexchange.com/questions/645545/12-v-soft-start-circuit), [this](https://electronics.stackexchange.com/questions/745197/inrush-current-limiter-with-pmosfet), [this](https://electronics.stackexchange.com/questions/723758/inrush-current-limiter-circuit-with-mosfet), [this](https://electronics.stackexchange.com/questions/163939/inrush-current-limiter-design-questions-review), [this](https://electronics.stackexchange.com/questions/80365/capacitor-inrush-current/80428#80428), [this](https://electronics.stackexchange.com/questions/294061/p-channel-mosfet-inrush-current-limiting?rq=1) etc. (the list is long!) that have solved the problem of limiting inrush current and ensuring soft-start of the circuit. In fact, [I too have posted a question there](https://electronics.stackexchange.com/questions/761381/pmos-based-pre-charging-and-voltage-soft-start-circuit-using-ltspice-simulations), and [I attempted to answer my own question](https://electronics.stackexchange.com/a/761769/344652). **Simulation Data:** **Circuit Schematic using PMOS**  **Simulation Output using PMOS**  **Circuit Schematic using NMOS**  **Simulation Output using NMOS**  **Question(s):** I would appreciate an in-depth evaluation from the community towards my approach. Have I implemented the concept correctly? Can I go ahead and build a hardware using my schematic? Will my components heat-up? From a designer's perspective the list of questions could be endless. All I am looking for is a brutally honest criticism so that I do not fail in my hardware. **Note:** All the components are from the default in-built library of LTspice.
