Guarding high-impedance AD8244 input traces from a fine-pitch connector — how much is really needed?
I have 4 very high-impedance analog signals coming from a fine-pitch 100-pin connector to AD8244 buffer inputs. An electrochemical biosensor IC will be mouted on this connector. Its reference electrode pin is connected to buffer. The buffer output is connectes to AD5941. The board stack-up is:
Signal
GND
PWR + GND
Signal
After the AD8244, the buffer outputs go to an AD5941, so my concern is only the connector-to-AD8244 input section, which is the high-impedance part.
The SEAX8 leads have an alternating pitch of 1.20mm and 0.80mm between pairs (not a pure uniform 0.80mm grid like a BGA).
From the AD8244 datasheet, guarding seems recommended for very high-impedance input nodes. My practical problem is that the connector escape area is very dense, so it may be difficult to place proper guard traces immediately from the connector pins.
I would like to ask:
Is it acceptable to start guarding only after the connector breakout, and focus mainly near the AD8244 input pins?
If there is a short unguarded section in the connector fanout, is that usually acceptable if the rest of the route is done carefully?
Since I already have a GND plane in the stack-up, does that reduce the need for guarding, or is a true driven guard still necessary for this kind of node?
If guard traces are used, do they need to be present on all 4 layers, or only on the layer where the high-impedance signal is actually routed?
If full guarding is not practical near the connector, what is the next best approach?
keep the traces short
keep them away from digital lines
use GND shielding where driven guard is not possible
1 answer
The following users marked this post as Works for me:
| User | Comment | Date |
|---|---|---|
| newbie | (no comment) | Apr 27, 2026 at 13:49 |
Is it acceptable to start guarding only after the connector breakout, and focus mainly near the AD8244 input pins?
There is no guard police that will decide whether what you do is acceptable.
To determine whether something is good enough, you need performance specs. In this case, that would be the maximum load on the signal trace that can be tolerated. Is 100 kΩ good enough? Does it need 1 MΩ? 10 MΩ? Something else?
Until you can define "success", you can't design the guard strategy, or even know if you need guarding at all. "Guarding seems recommended" in a datasheet of a random buffer amplifier should not be how you decide to guard a trace.
Keep in mind the purpose of guarding, which is to make the loading impedance of a signal to the rest of the world high. Normally, the insulation of the PC board material causes good enough impedance from a signal to the rest of the world. However, that can be insufficient for very high impedance signals.
Talk to your board house and find what surface and bulk resistance they are willing to guarantee. That will be for clean boards. Dirt and moisture greatly decrease surface resistance, so you either have to account for that or make sure the board stays clean in end use.
Let's say (just making up numbers, don't take this as representative) that you can count on 100 MΩ/square surface resistance. If you have 8 mil spaces between tracks, and two tracks run parallel for 1000 mils (1 inch, 25 mm), then there are 125 squares between the two tracks. Each square is like a little 100 MΩ resistor. With 125 squares in parallel, the resistance between the traces is only 800 kΩ minimum guaranteed.
This points out two ways to make the resistance between tracks higher: Space them farther apart, and make the run shorter. There are also extra high impedance PCB processes, but eventually moisture and dirt will dominate regardless of the PCB material. Soldermask makes a difference too.
A similar analysis should be done for the bulk conduction.
You really have to have a conversation with your board house if you need unusually high impedance.
Guarding is something you do when the above is not good enough. Ideally the guard trace is driven with low impedance to the same voltage as the signal trace being guarded. When that is done, the resistance from the signal trace to the guard becomes irrelevant since no current flows thru it. In the above example, you have a 800 kΩ connection to the buffered guard instead of to ground or random other nets on the board.
So is leaving out the guard around connector pins OK? Think of little resistors along the PCB surface from the signal trace to adjacent traces. You haven't provided information to guess at the accumulated resistance nor what resistance is acceptable, so we can't answer that question.
use GND shielding where driven guard is not possible
Since I already have a GND plane in the stack-up, does that reduce the need for guarding, or is a true driven guard still necessary for this kind of node?
Grounding and guarding are two different things. One is not a substitute for the other.
If guard traces are used, do they need to be present on all 4 layers, or only on the layer where the high-impedance signal is actually routed?
That depends on the bulk conduction specs from your PCB house, and your spec as to what resistance load you can tolerate.
If full guarding is not practical near the connector, what is the next best approach?
Find a better connector.
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