Activity for elgonzoâ€
Type | On... | Excerpt | Status | Date |
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Comment | Post #283170 |
That said, fast division in HW is still a topic for research papers. As an example here a paper from 2005: https://www.researchgate.net/publication/4156467_A_hardware_algorithm_for_integer_division (disclaimer: I haven't read that paper, so i don't know whether it is a good paper or just hot garbage.... (more) |
— | over 3 years ago |
Comment | Post #283170 |
Actually, trying to brute-force division with a bunch of subtractions alone is slow like molasses (like it would if doing multiply with adders alone). For some idea wrt to hardware division look for example here: https://electronics.stackexchange.com/questions/155899/implementing-integer-division-in-... (more) |
— | over 3 years ago |
Comment | Post #283170 |
Multiplication in hardware is a combination of adders and bit shifting. Thus multiplying two 64-bit numbers, however large, only takes 64 bit shifts plus at max. 64 additions. This is not only incredibly fast, but also cheap in circuitry. You only need an 128 bit adder, a 128-bit shift register, anot... (more) |
— | over 3 years ago |
Comment | Post #283170 |
Just as an aside, the reason you usually only find adders and not subtractors is because using two's complement, you only need one instance of logic block (adder) in a circuit to do both operations. Consider that die space is usually prime real estate that to a large extent determines the price of a ... (more) |
— | over 3 years ago |