Activity for Elleanor Lopezâ€
Type | On... | Excerpt | Status | Date |
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Question | — |
Siglent1104 oscilloscope channels lagging First I noticed that clock begins before chipselect gets pulled low on SPI. After eliminating potential sources I started to suspect the scope. I connected all 4 channels to function generator at different frequencies and observed 25ns gap between channel pairs. The probes were all the same 100Mhz st... (more) |
— | over 2 years ago |
Comment | Post #286538 |
@#36396 I added description on how to inspect the graph in post, and also added verbal description of the graphs in case the picture cannot be opened. It is a screenshot from a video, unfortunately I don't know how to enhance quality of that. There is also a link to the video with embedded timestamp,... (more) |
— | almost 3 years ago |
Edit | Post #286535 |
Post edited: |
— | almost 3 years ago |
Edit | Post #286535 |
Post edited: Described the axis |
— | almost 3 years ago |
Edit | Post #286535 |
Post edited: |
— | almost 3 years ago |
Edit | Post #286535 | Initial revision | — | almost 3 years ago |
Question | — |
Unexpected impedance spike when paralleling capacitors I was watching a video from EEVBLOG about bypass capacitors, and he presented a theory that randomly connecting different values of capacitors in parallel can create unexpected impedance spikes: Image alt text To inspect the picture, right click and open in new tab, the scales are then visible. Reg... (more) |
— | almost 3 years ago |
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