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Comments on Isolated Digital Input - Overvoltage protection

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Isolated Digital Input - Overvoltage protection

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I am trying to build an active-low digital isolated switch capable of withstanding 32VDC voltage without creating any damage to the system.

This is the snapshot of the circuit not fulfilling the requirement: Circuit

"ISO_PIN_PROG_1" will be connected to the switch which will tie to the ground and causing the base of the Q29 to go below 0.7V hence cutting off the OC7.

"PIN_PROG_1" will be connected to the MCU input.

If there is a 32V applied by the accident on "ISO_PIN_PROG_1" this would cause problems with the circuit as is. How could I properly solve it?

  • Step 1: Since 3V3_ISO would be LDO driven I would probably add a diode with the anode connected to the LDO output and a cathode connected with the LDO input to prevent the LDO to have output higher than the input. Based on my experience they tend not to love that. I haven't post that because I haven't yet designed the power stage.

  • Step 2: Add Zener regulator at i.e. 12V with a properly dimensioned resistor and add one more resistor in series with Q29 base to limit the current - does it need to be limited because there is a limit how high Ic of the Q29 could be in full saturation? I believe it should because it won't be in the forward active region anymore.

I may be stuck having multiple unknowns and not being really secure whether this is the right topology for the task and whether I am addressing the problems correctly so your help would be kindly appreciated! Thanks as always!

Further clarifications ——————————————————————————

When input is left floating opto’s diode is forward biased as seen on the schematic. When input is low, the opto should be off therefore “PIN_PROG_1” should be high. That is really all in terms of usual usage. However, there is a chance that someone would connect 32V max on the input and without adding any support the circuit shown would be damaged. Proper operation during the event is not needed - so when between 3V3 and 32V on the Q29 base circuit and PSU should not be damaged, output of it is less important. Snap on action is not required. Esd protection is important. Input impedance should be high.

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General comments (3 comments)
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UPDATED. based on clarification to original question.

To be clear, just an idea, not tested for this situation!

It is abusing the V_I_L margin on the 3.3V CMOS input, so series diode should be schottky...

foo4

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General comments (4 comments)
General comments
2kind‭ wrote almost 4 years ago

If 36V is applied on the left terminal, "Vbr=36V" has no impedance to work against. A small resistor between the input and the Zener would do the job to keep it below max. power dissipation.

Pete W‭ wrote almost 4 years ago · edited almost 4 years ago

@2kind -- My thought process was to pick the outer Vbr to be greater than the max continuous voltage that could be present, which I interpreted from your description to be +32V. I.e. it would not conduct at +32V, nor would the series diode. The outer TVS is meant to do most of the work in any higher voltage transient here, the inner one is just a backup for anything that gets past the series diode, perhaps redundant as the chip has some built in too.

2kind‭ wrote almost 4 years ago

Got it - it's a TVS.

KalleMP‭ wrote almost 4 years ago

I would add an input resistor to protect the 36V diode.