Comments on PNP Darlington pair as a current limiter
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PNP Darlington pair as a current limiter
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I am trying to analyse what is controlling the load current in the below Darlington configuration.
- Is it the base current of transistor Q3 which is controlling current through R14 / emitter current of Q2?
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If it is, then is the maximum permissible load current is calculated by Ic(Q3) * Q1 beta * Q2 beta ?
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From light load to maximum load, will all three transistor stay in the active region? For light loads , Q2 may get into saturation region I suppose.
EDIT : Alternate circuit to achieve the same functionality
are there any drawbacks to use this circuit ?
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