Communities

Writing
Writing
Codidact Meta
Codidact Meta
The Great Outdoors
The Great Outdoors
Photography & Video
Photography & Video
Scientific Speculation
Scientific Speculation
Cooking
Cooking
Electrical Engineering
Electrical Engineering
Judaism
Judaism
Languages & Linguistics
Languages & Linguistics
Software Development
Software Development
Mathematics
Mathematics
Christianity
Christianity
Code Golf
Code Golf
Music
Music
Physics
Physics
Linux Systems
Linux Systems
Power Users
Power Users
Tabletop RPGs
Tabletop RPGs
Community Proposals
Community Proposals
tag:snake search within a tag
answers:0 unanswered questions
user:xxxx search by author id
score:0.5 posts with 0.5+ score
"snake oil" exact phrase
votes:4 posts with 4+ votes
created:<1w created < 1 week ago
post_type:xxxx type of post
Search help
Notifications
Mark all as read See all your notifications »
Q&A

Comments on DAC controlled high side current source.

Post

DAC controlled high side current source.

+7
−0

I'm designing a high side current source that can be controlled with a Digital-to-analog and can source up to 100mA with voltage supply up to 36V.
By high side I mean one side of load will be always grounded. Below you can see a reference design of a such circuit.

Image alt text

In the design above the main issue is that the output of the DAC needs extra amplification and also the output of the OP Amp needs to go up to V+ in order to put MOSFET Q to cut-off region.
Which means the Op Amp needs to have a rail-to-rail output at best and also a wide operating voltage range that can go up to +36V.

So, I was thinking maybe to do some modifications so I can replace the op amp with something that can work with much lower voltage. Perhaps with the same voltage as DAC works.

Image alt text

The OPAMP1 could be a generic differential amplifier or even better an integrated current sense IC that will result in a current to voltage conversion. This will feed the OPAMP2 who can work at the same voltage as the DAC IC.
When the current goes up, OPAMP1 voltage rises, OPAMP2 pulls its output down to zero, Q2 stops contancting VGS of Q1 decreases and limits the current of the drain-source channel.

The question:
I'm very concerned that something will not work regarding the mosfet control circuitry, especially the Q2. Is there something that needs to be done in order to achive smooth control of the current?
The longer I see the circuit the more confused I get and I'm starting to believe that the gate will start to oscillate.

Design Specifications:

  • 0.1% accuracy on the output current.
  • Accpetable voltage drop across power elements up to 8V.
  • Lowest voltage across load in zero setpoint must be closest to zero possible.
  • Operating voltage range 12V to 36V
History
Why does this post require attention from curators or moderators?
You might want to add some details to your flag.
Why should this post be closed?

3 comment threads

SPMS? (2 comments)
Accuracy? (2 comments)
Compliance range? (2 comments)
Compliance range?
Olin Lathrop‭ wrote over 2 years ago

What's the complete compliance range your current source needs to have. You said the upper end is 36 V, but how close to 0 V must it still work? Also, what supply voltages are available, and don't tell me 36 V is the max. There will always be some drop across the current sense and/or pass element. Knowing the headroom available at each end is very important to picking a topology.

DeadMouse‭ wrote over 2 years ago

The upper voltage across the load can be a little lower if we calculate the voltage drop across the current sense and the power element. I wouldn't mind even if that voltage drop was around 6V or even 8V. On the other hand the low voltage across the load must be closest to zero possible.