Q&A

# Estimating the input capacitance of an BLDC motor controller

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Problem Description

I am trying to design a BLDC inverter and I am in doubt of what would be the right approach for estimating the input capacitor size/type. Doing it empirically or throwing everything in SPICE is one approach, but I would like to understand what is going under the hood and at least start from somewhere.

Since there are infinite possible solutions, I know I need to fix some variables before going any further. The initial thought was to allow for "V" volts of ripple at the input. After I fixed this and knowing what the value of ripple current is, "Iripple", I can get the max allowed resistance "R" of the input capacitance network because ripple current is what is causing the input voltage ripple. Therefore I have:

Rcap_max = Vripple/Iripple

Ok, still no clue about the capacitance value so I need to move forward.

We know about "i = C * dv/dt" - if I rearrange this in order to find the minimum capacitor value I have:

Cmin=I* D /(fsw*Vin_max); "D" being the duty cycle

Based on "Cmin" and "Rcap_max" I can choose the input capacitance.

But...

Previous calculations assumed zero impedance coming out of the external cables connected to the DC-link power terminals. With the increase of the cable length, cable impedance would increase and will form a pole at:

f=1/(2pi*sqrt(Lcable * Cinput))

This would cause ringing which could potentially damage the inverter.

Questions

(1) How can I determine the maximum cable length(or inductance, to make the problem simpler) which can be used given the input capacitance value? Do I set the pole at i.e. "fsw/10"(Hz) and then work backward?

(2) Is there a better way of approaching it using the "napkin math" approach?

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What is seems you really want to know is how to size a power supply filter capacitor, not what the input capacitance of something is.

The objective is to keep the ripple voltage below some value. To determine ripple voltage, you need to know the characteristics of what charges the capacitor, and what discharges is.

It seems in your case, the capacitor will be charged from a reasonably steady supply, but with some series resistance due to the wire. You can model that well enough for most purposes as an ideal voltage source with a resistance in series.

The tricky part in your case is to know the characteristics of the discharge current. In this case, that is the current drawn by your motor controller. Since you are designing it, you should know what the maximum current draw is, and whether it uses pulses, and at what frequency.

Note that the capacitor can only help with ripple caused by uneven current draw. No amount of capacitance can fix the drop across the resistance to the power supply due to the steady state current. For example, if the resistance of the wires back to the power supply is 1 Ω and the motor controller draws a steady 2 A, then the voltage at the motor controller will be 2 V lower than the power supply output, regardless of how much capacitance you add in front of the motor controller. Put another way, the added local power supply filter capacitance can only reduce the AC component of the ripple, not the long term average (DC). Even more specifically, capacitance reduces the ripple proportional to the ripple frequency, with more capacitance merely changing the proportionality constant.

To calculate how much capacitance you need, you have to know how much the current can suddenly change and for how long.

As an example, let's say the motor controller draws current as a 0 to 2 A square wave at 25 kHz. The period is therefore 1/(25 kHz) = 40 µs. The controller will draw 2 A for 20 µs, then 0 A for 20 µs. Since we intend to make the ripple a small fraction of the total supply voltage, we can make the simplifying assumption that the power supply (with its series resistance) is delivering a steady 1 A to the capacitor.

The capacitor current is the charging current minus the discharging current, which is a -1 to +1 A square wave with each level lasting 20 µs. This will result in a triangle voltage waveform. To calculate the peak to peak voltage, we only need to find how much the capacitor voltage changes due to 1 A for 20 µs.

One way to see where we're at is to calculate this ripple for a plausible capacitor value of a nice round number. It is then easy to scale the ripple from there inversely proportional to the capacitance.

Let's use 1 mF to see where things are at. The basic formula is:

V = A s / F

where V is the change in voltage, A the applied current in amps, s the time the current is applied in seconds, and F the capacitance in Farads. Plugging in our example values:

(1 A)(20 µs)/(1 mF) = 20 mV

So a 1 mF capacitor results in 20 mVpp ripple in this example. If you want different ripple, scale the capacitance accordingly. For example, it would take 2 mF to result in 10 mVpp ripple, and 400 µF results in 50 mVpp.

There is one more wrinkle, which is equivalent series resistance (ESR) of the capacitor. As a first approximation, you take the 2 App current draw and multiply it by the ESR to get additional ripple on what was calculated above. For example, if the capacitor has 100 mΩ ESR, then the actual ripple will be 200 mVpp more than with a pure capacitance (0 ESR).

Let's say that in the example above you want to limit the ripple to 100 mVpp. With a 1 mF capacitor, the ripple due to the capacitance is 20 mV. That leaves 80 mV budget for ripple due to the ESR. (80 mV)/(2 A) = 40 mΩ, which is the maximum ESR you can tolerate in this hypothetical example.

What might be the reason behind people recommending low-ESR caps put every 1m at the DC link cables for most of the RC stuff?

I haven't seen such a recommendation, nor have you provided evidence of any, so we can't guess what motivation might be behind such advice (if it exists at all).

In any case, capacitance lumped at the point of use is never worse than the same capacitance spread out over a length of cable, assuming the purpose of the cable is only to deliver power.

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## Cable inductance:

• approx 1uH/m +/-50% depends slightly on l/d ratio , while cable impedance from sqrt(L/C) depends on twists/ft 50pF/m while coax is ~100pF/m

## Bulk storage Cap

• C value should store Energy Ec for load power x sag time between pulses with the ripple current rating spec derated >50% or ESR computed for same with ripple voltage spec and heat loss or D.F. @ f Thus compute Ec max x Ec min for ripple voltage max,min. to provide power between PWM pulses.

• For AC the peak/avg current ratio is the inverse of % voltage ripple , i.e. 10% V ripple means about 10x peak current to sustain average load current max.

• For very low ripple or very high current, multi-phase PWM converters are used.

# Anecdotal

FWIW this is just anecdotal experience of modifying a variable AC/DC 100W 3ph 74Vdc fan powered by 120Vac.

—————————————-

Last year I modified a 5000 CFM 3-phase 100W fan to operate in the reverse direction and installed in my attic just under the chimney type static roof vent for removing solar heat effects on a 3 ton Air conditioner in hot summer days in a older mid 80’s house with inadequate insulation. I added >R50 blown fibreglass 16 to 24” deep and it did’t help. The problem was the static vents couldn’t remove the hot air fast enough and the Whirleybird vent didn’t move on a calm hot day.

Background

The solution required me to reverse-engineer the STM uC control of the drivers and Hall sensors and ended up bringing out the variable speed control voltage and 5V, 0V and a temp sensor on Cat5 cable along with the 120V Ac cord for remote control of attic temp. One only had to choose the right pair to swap of 3 Hall sensors with any select pair swapped of the 3ph motor lines. Then reshape the 3 blades for a reverse angle and then I could strip the casing and insert it to pull air out of the roof vent , rather than push without a means to attach it to the static vent. It was a challenge to get the 14” fan to fit inside the 12” square roof hole , it worked like a charm, quiet, but powerful like a cyclone. ( at least pulling the volume of insulation reduced volume of air every second or so.)

They used a non-isolated AC to DC-DC converter to -74V w.r.t. gnd so 5V was actually -69V and 0V for some logic was -74V.

## e-Caps

They did use Nichicon bulk caps to rectify the line but I don’t have the p/n’s. They were used to rectify Ac and smooth the DCDC bulk output ripple with ~1.4A DC and low ripple voltage. I estimate ripple current was low in this case but ESRxC is <10us for low ESR types and ~150 us for standard e-caps.

The STM uC used the pot voltage 0 to 5V to control the 3 phase sine waves PWM modulated and a V/f transfer function with a slew-rate controlled fan speed so the peak current starting never exceeding rated current for 100W unlike a full start that would take 1kW. This made the power source matched to the load and made it extremely efficient and quiet ramping up in a couple seconds. The FET array was heatsink and of course forced air cooled.;) but never got warm .     I don’t have the partial schematic handy or the cap p/n’s but could get if nec. They tried to sand off all the critical p/n’s on ICs but I could still read them to figure out how it worked. . Why does this post require moderator attention? 