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Using only ceramic capacitors on an input of an SMPS - unclear advice from manufacturer

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I was reading through the datasheet of a boost converter, TPS61023 from TI.

In the "Input Capacitor Selection section", they give the following advice:

8.2.2.5 Input Capacitor Selection

Multilayer X5R or X7R ceramic capacitors are excellent choices for the input decoupling of the step-up converter as they have extremely low ESR and are available in small footprints. Input capacitors must be located as close as possible to the device. While a 10-μF input capacitor is sufficient for most applications, larger values may be used to reduce input current ripple without limitations. Take care when using only ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, a load step at the output can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even damage the part. In this circumstance, place additional bulk capacitance (tantalum or aluminum electrolytic capacitor) between ceramic input capacitor and the power source to reduce ringing that can occur between the inductance of the power source leads and ceramic input capacitor.

Notably, TI advises against using only a ceramic capacitor at the input, citing that it could induce ringing when a load step is applied at the output. The recommended solution is to place an electrolytic bulk capacitor between the ceramic capacitor and the input pin of the boost converter.

I am confused why this advice is given. The claim is that is reduces ringing caused by the inductance of the input power trace, but electrolytic capacitors usually have a worse ESL/ESR than ceramics. Nowadays, ceramics can have a comparable capacitance to the electrolytics as well. I know that ceramic capacitors can have a piezoelectric effect but I have not seen that cited as an issue for SMPS input capacitors.

So, what is the reason for this manufacturer advice?

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The electrolytic capacitor acts as a snubber in parallel with the ceramic capacitors. If one were to design an RC snubber to dampen the LC circuit, it would have a large capacitance (compared to the ceramic), and some series resistance. An electrolytic capacitor with some ESR is a cheap way to get both. Its ESR works as the resistance for the snubber.

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First, note this only applies when the line to the input power source is long enough to have significant inductance. If the power source is on the same circuit board, then this isn't an issue.

They are modeling the input power feed like this:

This is basically an L-C tank circuit with no way to dissipate any energy. Once a transient starts it ringing, there is nothing to make the oscillations die down.

One way to dampen ringing is to add series resistance to C1. What they are saying is that ceramic capacitors are too ideal in this regard, and have very little effective series resistance. However, you don't really want any series resistance for the purpose of providing a low impedance input voltage to the buck converter.

Their solution is to add more lossy capacitors across C1. That way C1 continues to keep the input power feed to the buck converter low impedance, since it is directly in parallel with it. The additional capacitor will have more effective series resistance, which will only matter when the voltage across C1 is changing. That's exactly what you want to dampen any ringing.

They are counting on the non-ideal characteristics of electrolytic capacitors, in this case the relatively large effective series resistance. The effective series capacitor-resistor combination becomes a snubber.

You could add your own snubber with a more ideal capacitor and deliberate series resistance added to create the same effect. If you really care about this issue, then that's actually a better approach. Relying on non-ideal and unspecified parameters of component is bad practice. Unless your electrolytic capacitor datasheet specifies a minimum guaranteed ESR, using one as advised by TI is technically out of spec.

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