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Potentiostat Clarification needed

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The below circuit is take from here.

May I know how this circuit maintains the Potential at Reference Electrode and Working Electrode same.

Image_alt_text

Here you can see that the working electrode is connected to IC1 and Refrence electrode to IC2.They are not in a common loop.Then how this circuit maintains same potential at working electrode and reference electrode.

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What the top part of the circuit really does is drive the counter electrode to whatever it takes to null out the voltage on the reference electrode. The null comes from what the positive input of IC2 is set at, which is ground in this case.

I'm not familiar with these types of sensors, but it looks like the reference electrode is run at high impedance with the counter electrode adjusted to keep the reference electrode voltage at 0. The working electrode is then held at 0 V (or very close to it) and its current measured.

Note that opamp IC2 is configured as a transconductance amp. In other words, its output is proportional to the input current. The negative input is held at the same voltage as the positive input (0 in this case), and the output voltage shows what current it takes to do that.

Don't get confused by the FET. It is only there for startup reasons. It is high impedance between source and drain during normal operation.

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