Using one shared reset signal across two rigid boards connected by flex PCB — good practice or risky?

For EMC reasons, it is bad practice to have "TTL-level" signals in general, and resets in particular, to leave the PCB. You only have 90mm which isn't a long distance, so if it is ok or not would depend on your EMC requirements.

The kind of circuit you describe is very common with a LCD module sharing reset with a MCU over a flex cable.

1. Can a reset trace routed through the flex pick up noise and cause false resets?

Yes that is definitely a risk, particularly in noisy environments like industrial/automotive. For a common commercial application, it might not be as much of a concern at short distances.

I had a LCD with similar (5V level) design which worked fine even in industrial environments, but when we tried to put it through tougher MIL EMC, it failed. So it is all about your requirements, as usual.

2. Since the reset line is longer than a local reset trace, do I need any special protection or filtering?

For a rugged solution, I would rather consider providing some different kind of signal, like a constant current-modulated one, which in turn controls the /reset signals through a BJT. But this might be totally overkill depending on the requirements.

3. Is it better to keep a common reset for both ICs, or should each device have its own separate reset?

I have seen both kinds, I don't think there's any particular advantage/disadvantage. It might depend on how your MCU reset pin works. Traditional MCUs had a /reset pin which both acted as input but could at the same time also drive other parts low when the MCU got reset. For example before on-chip LVD became mainstream, you would always have an external voltage supervisor IC which would reset the MCU in case of brown-out, and maybe also reset some external devices. Or the MCU could reset the external devices itself when it got a watchdog reset or similar.

Newer MCUs do not necessarily have that same "I/O" functionality.

4. If a shared reset is acceptable, what layout precautions are recommended?

This too would depend on the specific reset pin behavior. For example hooking up a RC filter on the reset pin could cause timing problems. I've worked with MCUs that were sensitive against too big decoupling caps on the reset line, that wouldn't boot because of it.

Other than that, general best practices for routing any kind of signal.

posted 5 months ago

CC BY-SA 4.0

Lundin‭

1951 reputation 37 73 323 89

First:

This is the stack-up.

That's not a "stack-up". Board stackups show the layers, or what is sometimes referred to as the Z dimension. Your diagram shows the other two dimensions. The one thing it doesn't show is the stackup.

I am considering using one shared system reset signal for both devices

That can be OK, but there are alternatives:

1. Have a single reset line to the processor. The processor then resets everything else when it wakes up, and releases it from reset when all the other state is ready for it.
2. Have a single master reset, but don't tie it directly to the individual reset inputs. Have it turn on a transistor in each part separately, which then activates the actual reset inputs. This allows making the master reset whatever impedance you like, can be less susceptible to noise spikes, allows arbitrary polarity, can be made to tolerate a wider voltage range, and could even add hysteresis.

#1 would be my first plan unless there is a reason not to. It allows for greater flexibility in what is reset when, power-up sequencing, etc. Note that you can still do #2 for higher robustness. That depends on where and how far the external reset signal goes.

Avdd from LDO, Dvdd from another LDO

This isn't necessarily wrong, but consider running the unregulated power with separate LDOs on the other rigid part. That gets around some voltage drop in the power feed, and should result in cleaner regulated power at the remote end.

posted 5 months ago

CC BY-SA 4.0

5mo ago

Olin Lathrop‭

9528 reputation 19 423 1122 516