Activity for ErnestoGâ€
| Type | On... | Excerpt | Status | Date |
|---|---|---|---|---|
| Comment | Post #285024 |
(cont.) they'd think that one can simply make a current source by fixing a voltage at the gate and that'd be it. Obviously, we all know that cannot be further from the truth. I wonder how they'd feel after learning that feedback is needed to achieve such ideal behavior.
Finally, I must say I had n... (more) |
— | 6 months ago |
| Comment | Post #285024 |
I think any circuit designer would be very delighted to have such a simple model to get insight and estimate performance. However, I'm of the opinion that every model, however simple it might be, should not only be useful to understand things qualitatively, but also quantitatively, otherwise it'd be ... (more) |
— | 6 months ago |
| Edit | Post #290101 |
Post edited: better worded |
— | 7 months ago |
| Edit | Post #290101 | Initial revision | — | 7 months ago |
| Answer | — |
A: When and where to use vias in an IC design layout Vias are used to move up in metal layers. The contacts of the transistors can be directly connected with metal 1, but if you want to use higher metal levels, you move up to them with vias. For example, if you use M1 (metal 1) and you need to cross another M1 trace that does not belong to your node... (more) |
— | 7 months ago |