Comments on MOSFET drain current ringing in saturation region
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MOSFET drain current ringing in saturation region
I benchtested below 0.7A constant current source circuit and observed few cycles of oscillation on drain current. With the help of bode plot analysis , I have managed to reduce the oscillations on drain current by increasing the phase margin to some acceptable level.
While doing the analysis , I observed in Ltspice and on the test bench that the amplitude of drain current oscillations and cycles increase as the drain voltage gets reduced from 30V to 7V.
feedback element between drain terminal and gate terminal is miller capacitance. Is miller capacitance value getting reduced due to the application of higher voltage across it like it does in ceramic caps ( Vdg = 30V -Vg) and hence stores lesser charge compared to 7V ? and due to lesser stored charge , it gets dicharged in fewer cycles ?
looking forward to the comments on this .
Thanks
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It's got nothing to do with the MOSFET's miller capacitance. Miller capacitance causes problems in common-source circuits but, your circuit is common-drain (or source follower) hence, with a steady DC voltage on the drain (your power supply), there can be no problematic feedback via the miller capacitor to the gate.
Any issues with the stability (from to a step change in demand) are due to the 50 kΩ gate resistor and the gate-source capacitance. You might say "hey, it's a source follower so gate-source capacitance doesn't come into play" and, that would be a fairly valid point should the MOSFET source follower have near unity voltage gain (like a BJT). But, it doesn't so, about 50% of the gate-source capacitance can be modelled as sitting between gate and 0 volts.
This produces a sizable extra chunk of phase lag that approaches 90° in the feedback loop and takes you close to instability. In fact, many of these types of circuit are so unstable that local feedback around the op-amp are needed to stabilize them.
Then you should ask yourself, do you really need a very fast response in load current from a demand change and, if not, then put an RC filter between demand input and non-inverting input of the op-amp.
Regarding the variation in overshoot with supply voltage, this might be because the drain-source capacitance increases as drain-source voltage decreases. That capacitance can be regarded as being in parallel with the load hence, stability changes as supply voltage changes.
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