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Activity for Hawk2020‭

Type On... Excerpt Status Date
Comment Post #290333 This is what I was thinking. Thank you for the explanation.
(more)
11 months ago
Comment Post #290334 Appreciate the long answer. I've laid out a lot of boards with high speed and lots of layers, usually go back to Henry Ott's Electromagnetic Compatibility for a refresher on layers and such. I was focusing on the oscillators effect and if the GND plane would basically block the coupling but was not s...
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11 months ago
Edit Post #290332 Initial revision 11 months ago
Question Noise from oscillator on top layer to clock on bottom layer with VCC & GND layers between
What effect does an oscillator potentially have on a SPI clk signal if the oscillator is on the top layer, with GND and VCC layer in between on a four layer board. I know running it on the same layer within a certain distance will have coupling effects that could cause noise and the 3W rule. I don't ...
(more)
11 months ago
Edit Post #288989 Initial revision over 1 year ago
Answer A: Is ESD overhyped?
I know of a designer that didn't add ESD protection on a mass manufactured product in the field. They had to replace almost 10 thousand units, because they kept popping in certain low humidity and when people used them in certain ways. So you'd rather be safe than sorry. An expensive error for a coup...
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over 1 year ago
Edit Post #287293 Post edited:
about 2 years ago
Edit Post #287293 Initial revision about 2 years ago
Answer A: Flyback transformer with Intrinsic Safety
I am also not an expert, but have been working on designing a couple of products that need C1D1, C1D2, and some IS associated apparatus with some electronics consultants that specialize in these certs. I assumed the zener power calculation would be what you did when designing an IS barrier for a ...
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about 2 years ago
Comment Post #276669 @Lundin Thank you for the information. I have a call with a consultant that an FAE I trust got me in touch with today.
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over 4 years ago
Comment Post #276662 @Lundin I have seen some designs that said to do that for the power dissipation requirements, but the "ia" part of the standard allows for the lab to cause 2 "countable faults", so the third zener is so that there is still protection if they fault 2 of them in the test.
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over 4 years ago
Comment Post #276649 I'm not using a lithium-ion battery. Probably will be Li-SOCl2 which is safer. It's a battery operated use-case, so I need the highest energy density I can get. Yes, this isn't a complete schematic; I was only using it to try and understand how to calculate the L and C, which I now realize, was not e...
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over 4 years ago
Comment Post #276669 Olin, You are correct on what I am designing. Thank you for the information. I am looking into getting a consultant. I am pretty deep into the standards needed right now, and have picked most components for the 2/3 of max ratings, 1.5 safety, with 2 faults "ia" with the IIA (propane--due to it being...
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over 4 years ago
Comment Post #276649 Interesting, did you not also use higher valued resistors, e.g. 300 ohm, for current limiting directly on the regulator outputs?
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over 4 years ago
Comment Post #276662 Andy, That makes a lot more sense. My confusion came from a conversation with an engineer at a cert lab: "For large capacitance/inductance from the“main” circuit, isolate/limit it from your barrier circuit. Output entity parameters on the barrier will be based on how you limit I,V,C,L to the ba...
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over 4 years ago
Edit Post #276649 Initial revision over 4 years ago
Question How do I calculate and manipulate the inductance and capacitance of outputs to a connector on a PCB?
I am designing a PCB that has to have class 1 div 1 associated apparatus (only the outputs to the sensor) certification. Essentially, I am using a boost converter to convert the voltage from a lithium battery of 3.9V to 18V to power a 4-20mA sensor in a hazardous zone, while the main product will be ...
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over 4 years ago