Activity for kadamrohan16
| Type | On... | Excerpt | Status | Date |
|---|---|---|---|---|
| Question | — |
MOSFET drain current ringing in saturation region I benchtested below 0.7A constant current source circuit and observed few cycles of oscillation on drain current. With the help of bode plot analysis , I have managed to reduce the oscillations on drain current by increasing the phase margin to some acceptable level. Constant current circuit LTspi... (more) |
— | about 2 months ago |
| Question | — |
Technique to reset pulse transformer core quickly I am analysing a pulse transformer which is required to transfer below communication protocol pulse from primary to the secondary side. The pulse duration is 32 μs and off time available to reset the core is just 7 μs. Calculation shows that -22.85 V are required to reset the core within 7 μs. For... (more) |
— | over 1 year ago |
| Question | — |
Thévenins Theorem for Transistor Circuit I am calculating the base current of transistor Q1. To simplify the circuit equations, I applied the Thévenin's theorem twice and converted V1, R1 and R2 into Vth and Rth, as shown in the image. \[ \begin{align} V{th} &= V1 \times (R2/R1+R2) && & R{th} &= R1 \p... (more) |
— | almost 2 years ago |
| Question | — |
PNP Darlington pair as a current limiter I am trying to analyse what is controlling the load current in the below Darlington configuration. 1. Is it the base current of transistor Q3 which is controlling current through R14 / emitter current of Q2? Image alt text 2. If it is, then is the maximum permissible load current is calcul... (more) |
— | about 2 years ago |