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Q&A

High Power Switch - High Side vs. Low Side Switching

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Imagine a battery pack with <=60VDC of maximum voltage and a load of up to 10kW of power(the PMSM inverter with the input capacitance of up to 1mF). The load is not always known - could be 100uF-1000uF input capacitance while the currents usually range from 20A up until 150A. The load is switched on/off using N channel Mosfets. Since there is no galvanic isolation present in the system peripheral communication interfaces(i.e. RS485/CAN) share the same GND as the load.

Approach 1) high side switch Switch the high side. Put FETs on the high side and control the "ctrl" net using gate drivers. The communication interface(RS485/CAN) is referenced to the "COM_GND" net.

Approach 2) low side switch Switch the low side. Put FETs on the low side and control the "ctrl" net using a 12V switch without gate drivers. However, in this case, the communication interface is referenced to the "COM_GND" net.

Note: Precharge circuit is present but omitted from the schematic

  1. Is there a superior architecture approach in this case?

  2. Could "Approach 2)" harm any of the components due to the ground reference loss?

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6 comments

There is way too much hand waving here. Draw a block diagram, and define your terms. We don't know what you think a "LVD domain" and a "PMSM inverter" are. And what is "1.000,00 uF" supposed to mean? Is that really 1 uF to absurd precision, or some screwup with commas and points? Olin Lathrop‭ 4 months ago

That's a bit better, but brings up other questions. Why are there two different FETs back to back for the switch? Where is the load? You mention communications interfaces, but none are shown in the schematics. What's the point of the current sources (I1 and I2 in your schematics)? You also have a regular ground, and "COM_GND". What exactly are these connected to outside of these schematics? Olin Lathrop‭ 4 months ago

Superior architecture: you don't need two series MOSFETs. What made you think you did? Andy aka‭ 4 months ago

@AndyAka The reason behind having two series MOSFETs is to prevent charging of the battery through the body diode when the FET is on. 2kind‭ 4 months ago

@2kind - don't be silly - that only applies to an AC voltage source where the MOSFETs alternate at blocking. This is a DC application as in "battery". Andy aka‭ 4 months ago

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2 answers

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It's still unclear what you are really asking, so I'll discuss the tradeoffs between low and high side switching of power to a load.

Low side switching

The main advantage of low side switching is that controlling the switch is easier. This is because the logic that decides whether the switch should be on or off is also generally referenced to the same ground that the switch input is.

For a BJT switch, this can be as easy as a series resistor between a digital output and the base of the BJT. In that case, the emitter would be tied to ground the collector to the low side of the load.

For a "logic level" FET, it can be even easier. The digital output can control the gate directly. The drawback with this is that FETs that can be driven from logic-level voltages have a lower voltage tolerance and lower power handling capability than FETs that require 10-12 V gate drive. However, when the load only draws a few amps and run from 30 V or less, a N channel logical level low side FET switch can be a good choice.

High side switching

The main drawback to high side switching is that you have to provide the gate or base control signal relative to the supply voltage, not relative to the ground where the logic usually is. Another problem is that when using an N channel FET, the gate drive has to exceed the supply voltage by the full gate-on voltage, usually 10-12 V for power FETs.

There are FET gate drivers with level translators and charge pumps built in. The input is a normal ground-reference logic signal, and the output is 0 or 12 V above the positive supply, controlled by the input signal. These FET drivers rely on switching edges to run the charge pump to make the 12 V above the supply, so require regular switching. There is no free lunch.

It is usually easier to use a P channel FET or PNP bipolar transistor for the high side switch. These don't need voltages above the supply to operate. However, P channel FETs usually have slightly worse characteristics than the N channel version with the same gate drive level, voltage tolerance, and current capability. Still, this can be a viable alternative unless the load draws high current where every mΩ of RDSON matters.

A PNP can be particularly easy to drive since you only need to draw some current from the base. If you can tolerate the few 100 mV saturation voltage and the slow turn off, then a PNP is about the easiest solution for a high side switch.

Load requirements

All the preceding was about the controlling the switch and the switch itself. The load may require high or low side switching for its purposes. In fact, this is the main reason to use high side switching at all. When the load is floating, like a motor, solenoid, light bulb, etc, then there is little reason not to use a low side switch.

When the load is connected to ground-referenced signals on its own, then you usually need to use high-side switching. You mentioned CAN and RS-485 connections. If these go to the load being switched, then you pretty much have to switch the high side.

Think of this from the load's point of view. When it is off, everyone else's ground will look like -60 V to the load. It is very unlikely that the CAN or RS-485 interface is designed to go high impedance when the load is off, and can tolerate being held at -60 V at the same time.


for floating loads, low side switching + galvanically isolate communication interface could potentially be used instead of a high side switch?

Yes, that can work. This is assuming when you say "communication interface", you really include all ground-referenced signals connected to the load being switched. There is nothing special about these signals being communication interfaces.

Some communication interfaces are harder to isolate that others. For example, the point to point ethernet varieties are easy since they are already transformer-isolated. You don't need to do anything special to connect a 10-baseT or 100-baseT ethernet to a floating device.

On the other hand, CAN is a lot more tricky. CAN requires sensing the state of the bus with sub-bit timing. For a CAN bus running at 1 MBaud, you don't want delays in writing or reading to exceed around 100 ns (1/10 bit time).

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1 comment

Thanks Olin! So for floating loads, low side switching + galvanically isolate communication interface could potentially be used instead of a high side switch? 2kind‭ 4 months ago

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Answer to question 1: First, you need p-mos and not n-mos, as you are switching the circuit from the above. Second, it is better and simpler to parallelize mosfets for big current switches; this will reduce the power dissipation as well.

So, even if there exist a pmos with 150A ability (which I'm not sure), it is probably better and less expensive to parallelize 3 p-mos (say) of 60A. The NVD5117PL 60V, 60A, is an option. Here is the schematic:

pmos-parallel

And here is a solution if you have to control the switch from below:

pmos-parallel2

Answer to question 2: There is apparently no problem with your second approach, but we don't know the whole story: is there anything else connected to the battery? we need to know the whole circuitry to answer to this question. Also, you may connect the ground after the mosfet switch, if the battery is floating. Finally, are you sure you know how to connect mosfets in series to distribute the power? this is not as trivial as parallelizing them for a switch!

Note: Again, I would implement 2 or 3 n-mos in parallel, in place of 2 n-mos in series.

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2 comments

Thanks for the comment @coquelicot. I made the mistake of not asking the question properly and thereby caused confusion. Will try to avoid this in the future as much as possible. Once again, sorry about that. Now, the point was not how to parallelize the current flow on the MOSFETs but do's and don't do's for high vs. low side switching. I like your idea about parallelizing PFET's because due to the different mobility of holes they tend to have higher conduction resistance. 2kind‭ 4 months ago

Well, you asked as if there a superior architecture approach, so I answered to that. coquelicot‭ 4 months ago

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