Activity for MissMulan
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Edit | Post #287366 | Initial revision | — | over 2 years ago |
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BJT common emitter amplifier equivalent circuit (π hybrid model) Im studying the equivalent model of a BJT common emitter amplifier at high frequencies.At university we tought that the BJT at high frequencies looks something like this:  However when designing a common emitter amplifier we h... (more) |
— | over 2 years ago |
Comment | Post #287302 |
Andy hi. I was taught it in university yesterday and I didn't understand it. (more) |
— | over 2 years ago |
Edit | Post #287302 | Initial revision | — | over 2 years ago |
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Thermal stability coefficient The thermal stability coefficient is defined to be: $S = \frac{dI{C}}{dI{CBO}}$ where $I{CBO}$ is the reverse current of the BJT when voltage isnt applied to the base of the BJT. In case of a BJT biased with 2 sources $I{C} = \beta \cdot I{b}+(\beta +1)I{CBO}$ However my textbook says that $... (more) |
— | over 2 years ago |
Edit | Post #286859 | Initial revision | — | over 2 years ago |
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Circuit which create ac sine wave from dc pulsed signal A full wave rectifier converts a sine wave to DC pulsed signal of double frequency. Is there a circuit which does the reverse process? (more) |
— | over 2 years ago |
Comment | Post #286836 |
@Elliot Alderson Editted. (more) |
— | over 2 years ago |
Edit | Post #286836 |
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— | over 2 years ago |
Edit | Post #286836 | Initial revision | — | over 2 years ago |
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Need help design a digital circuit which divides two binary numbers Before the circuit here are the digital blocks which have been already designed and exist as part of the division block 1 bit subtractor:  2 bit subtractor(in the digital block diagram of the division block there is a 3 bit... (more) |
— | over 2 years ago |
Edit | Post #286792 | Initial revision | — | over 2 years ago |
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Op Amp Hartley oscillator Im designing a Hartley oscillator this time with a opamp providing the open-loop gain.I have tried drawing the small-signal analysis of my circuit to use KVL and KCL to find the conditions of operation of my Hartley oscillator but now I am stuck.  |
— | over 2 years ago |
Comment | Post #286784 |
@a concerned citizen but arent they biasing resistors part of the input impedance of the circuit ?Why are we neglecting them? (more) |
— | over 2 years ago |
Edit | Post #286777 | Initial revision | — | over 2 years ago |
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Results of analysis of Hartley oscillator dont make sense I want to find the conditions of oscillation of the following Hartley oscillator.I have attached a load (ZL) to my Hartley oscillator Image alt text I have written KCL for nodes A,B: For node A: $$\frac{V{A}}{sL{1}} + \frac{V{A}}{Z{L}}+\frac{V{A}}{R{C}}-sC{1}(V{A}-V{B})+g{m}V{x} = 0 \righ... (more) |
— | over 2 years ago |
Comment | Post #286765 |
Why do I need the IV curve?I have approximated the tunnel diode to behave like a resistor $$ R_{d} = \frac{V_{T}}{I_{s}}$$ from Vf to Vv and from 0 to Vp (more) |
— | over 2 years ago |
Edit | Post #286760 |
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— | over 2 years ago |
Edit | Post #286760 |
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— | over 2 years ago |
Edit | Post #286760 | Initial revision | — | over 2 years ago |
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Modelling tunnel diode relaxation oscillator I have been trying to model this oscillator  I was wondering if we can somehow predict the frequency of the oscillations.For small currents inside a diode from the Shockley diode equation $$ e^{x}-1 = x$$ -> $$I{D} = \frac{x}{... (more) |
— | over 2 years ago |
Edit | Post #286745 |
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— | over 2 years ago |
Edit | Post #286745 |
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— | over 2 years ago |
Comment | Post #286745 |
@#36396 Editted. (more) |
— | over 2 years ago |
Edit | Post #286745 |
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— | over 2 years ago |
Edit | Post #286745 | Initial revision | — | over 2 years ago |
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DC-DC converter using Hartley oscillator and transformer Instead of using a buck or a boost converter can we use for DC-DC conversion the circuit Im going to describe in the next lines? First we begin with a Hartley oscillator whose output is fed into a transformer with N:1 turns ratio between primary and secondary windings. Then we rectify the voltage ... (more) |
— | over 2 years ago |
Edit | Post #286738 |
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— | over 2 years ago |
Comment | Post #286738 |
@#52987 you are correct a BJT doesnt have a CE junction I used too literally the small signal analysis of the BJT. (more) |
— | over 2 years ago |
Edit | Post #286738 | Initial revision | — | over 2 years ago |
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Small signal analysis of BJT in saturation region The small signal analysis of a BJT when the BJT is in amplification mode:  is easy.However what happens when the BJT is in saturation mode?  Can we rep... (more) |
— | over 2 years ago |
Comment | Post #286730 |
It is a exercise I made up to learn about filters. (more) |
— | over 2 years ago |
Edit | Post #286730 |
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— | over 2 years ago |
Edit | Post #286730 | Initial revision | — | over 2 years ago |
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Design high -pass filter with 2 points of the bode plot Im designing a high-pass filter which has a gain of -8dB at half of the roll-off frequency and I am stuck ,I dont know how to continue the design. In the bode plot of that filter we have 2 points:1 is at (fc,-3dB) and the other is at (fc/2,-8dB).What information must I extract to find the transfer... (more) |
— | over 2 years ago |
Comment | Post #286724 |
@a concerned citizen it is a EE question.Why does it matter why I want to ask the question? (more) |
— | over 2 years ago |
Comment | Post #286721 |
Ya I agree Q will be really high. (more) |
— | over 2 years ago |
Comment | Post #286724 |
I am designing it for fun. (more) |
— | over 2 years ago |
Edit | Post #286721 |
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— | over 2 years ago |
Edit | Post #286724 |
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— | over 2 years ago |
Edit | Post #286724 | Initial revision | — | over 2 years ago |
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A: Band pass filter given cutoff frequency and bandwidth My mistake was taking the third relationship $$ \frac{1}{RC} $$ which says how to find the bandwidth of a parallel RLC filter but we have a series RLC filter. Now solving the system : $$ LC = 100020001 , \frac{R}{L} = 2 $$ gives us the correct ratio between C1 and R1 and L1 with more detail: ... (more) |
— | over 2 years ago |
Edit | Post #286721 |
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— | over 2 years ago |
Comment | Post #286721 |
No I don't mean center frequency I mean bandwidth of the pass band filter,the range of frequencies at which the attenuation is higher than - 3dB (more) |
— | over 2 years ago |
Edit | Post #286721 | Initial revision | — | over 2 years ago |
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Band pass filter given cutoff frequency and bandwidth I have decided to try design a band-pass filter with a cut-off frequency of 10kHz and bandwidth of 2 Hz. Image alt text $$ \frac{1}{\sqrt{LC}} = 10001 \rightarrow LC = 1/100020001 sec^{2}$$ $$ \frac{R}{L} = 2Hz$$ $$ \frac{1}{RC} = 2Hz$$ Here is what I have done but if I plug the value... (more) |
— | over 2 years ago |
Edit | Post #286705 |
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— | over 2 years ago |
Edit | Post #286705 |
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Comment | Post #286700 |
@a concerned citizen I am just trying to explain to you what is inside my head. (more) |
— | over 2 years ago |
Edit | Post #286705 |
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— | over 2 years ago |