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Q&A Possible stray current corrosion in reinforced concrete

First clarify where this leakage current will be flowing. You seem to think that some parts of the solar panel will generate a small current thru the rebar into the ground, but where is the closed...

posted 1y ago by Olin Lathrop‭

Answer
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Q&A How to calculate the voltage of a coil?

The magnetic field will always be strongest in the middle of the solenoid. It will be slightly less at the ends of the solenoid and, it will be a lower value on the outside of the coil half way bet...

posted 1y ago by Andy aka‭

Answer
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Q&A Duty cycle of buck-boost converter

If you're referring to this Wikipedia page then the topology has a negative output. In that case, the problem as you have it stated in the OP, is misleading: it should be Vo=-20. With that, extract...

posted 2y ago by a concerned citizen‭

Answer
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Q&A What is this fourth connection in NMOS device?

That fourth connection is the bulk/body/substrate connection: - Image from here. On a normal 3 terminal MOSFET the "body" is connected to the source. On your device, the 3 n-channel MOSFETs shar...

posted 2y ago by Andy aka‭  ·  edited 2y ago by Andy aka‭

Answer
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Q&A Thévenins Theorem for Transistor Circuit

Is the Thevenin's Theorem being applied incorrectly for the circuit ? It's being applied inaccurately. The final Thevenin voltage should be 2.782 volts (rather than your calculated value of 2....

posted 2y ago by Andy aka‭  ·  edited 2y ago by Andy aka‭

Answer
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Q&A Level shifting of a 3 state logic pin

No, a resistor divider is not appropriate, at least not if you want to get all the information from the STAT pin. In addition, that chart in the datasheet is incomplete at best, or downright misle...

posted 2y ago by Olin Lathrop‭

Answer
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Q&A Unexpected impedance spike when paralleling capacitors

Unfortunately the frequency legend on your graphs are too small to see, so we don't know how the left and right graphs relate to each other. However, what is certainly going on in the left graph i...

posted 2y ago by Olin Lathrop‭  ·  edited 2y ago by Olin Lathrop‭

Answer
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Q&A Level shifting of a 3 state logic pin

I want to design a simple battery charger using MCP73831/2. This chip has a 3-State state pin according to the table below: I have a 3.3V MCU and I want to connect this pin to a GPIO. The MCU is...

2 answers  ·  posted 2y ago by dekker‭  ·  last activity 4mo ago by Nick Alexeev‭

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Q&A When do I need to put anti-aliasing filter in front of SAR ADC?

Since your noise has "unknown characteristics", you should do low pass filtering in analog before the discrete sampling of the A/D. The two parameters that matter are the frequency content of the ...

posted 2y ago by Olin Lathrop‭

Answer
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Q&A Unexpected impedance spike when paralleling capacitors

I think you can make a pretty good case for the spike being caused by the addition of the 100n and 10n capacitors: - I assume that the solder blobs between capacitors introduced a series indu...

posted 2y ago by Andy aka‭

Answer
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Q&A Limiting current to DC brushed motor

This question is related to my previous question. I want to drive a brushed DC motor using H-bridge. To power the motor two 18650 cells will be used in series. The issue is that I want to limit th...

1 answer  ·  posted 2y ago by Stefan‭  ·  edited 9mo ago by Lorenzo Donati‭

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Q&A Duty cycle of buck-boost converter

Nevermind (for now) what Wikipedia or anyone else says. Stop and actually think about it. One problem with the question is that is says "buck-boost" but doesn't otherwise define that. A buck-boo...

posted 2y ago by Olin Lathrop‭  ·  edited 2y ago by Olin Lathrop‭

Answer
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Q&A Oscilloscope potentially ESD striked

I have a Rigol DS1104 oscilloscope. Last week I stood up quickly from my table and saw a spike on the scope. Right now all the channels have a DC offset when probe is connected to ground or unconne...

2 answers  ·  posted 2y ago by ScopeMan‭  ·  last activity 1y ago by Lundin‭

Question oscilloscope
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Q&A What is the purpose of paralleling capacitors on the input/output of a power converter?

Lower ESR can sometimes be a reason, as you say. However, most of the time the advantage is a wider frequency range over which the combined capacitor has low impedance or low dissipation. The fre...

posted 3y ago by Olin Lathrop‭  ·  edited 3y ago by Olin Lathrop‭

Answer
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Meta Questions about the style of "Papers"

This page: https://electrical.codidact.com/help/papers says: A paper is more than just a few paragraphs, and more in depth than most answers. The starting level for a paper is about a detailed a...

1 answer  ·  posted 3y ago by leventov‭  ·  last activity 3y ago by Olin Lathrop‭

Question discussion papers
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Q&A Capacitor in 2nd stage of opamp

Inside a op-amp after the stage where the differential signal is converted to single ended , there is further amplification of the DC signal.For AC signals there is a capacitor parallel to the tran...

1 answer  ·  posted 3y ago by MissMulan‭  ·  last activity 10mo ago by Lorenzo Donati‭

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Q&A Meaning of some components around voltage reference in SMPS

I have generated flyback convertor schematic by TI's Webench Power Designer. Parameters: universal AC input (85-265V AC) 5V, 2A output isolated UC3843A controller Basically I understand f...

2 answers  ·  posted 3y ago by Chupacabras‭  ·  last activity 3y ago by a concerned citizen‭

Question component SMPS
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Q&A Capacitor ESR vs. Impedance

I'll try first to give a general introduction to the problem, then I'll switch to your particular questions. Passive linear components, like capacitors, inductors or resistors are not ideal. For t...

posted 3y ago by coquelicot‭  ·  edited 3y ago by coquelicot‭

Answer
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Q&A Design considerations for a synchronous DC/DC converter

In the field of DC/DC conversion, one can build a synchronous DC/DC converter (also referred to as synchronous rectification). This practice involves replacing a diode with a MOSFET switch. As far...

2 answers  ·  posted 3y ago by Mu3‭  ·  edited 9mo ago by Lorenzo Donati‭

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Q&A Why are antenna PCB traces square instead of rounded?

PCB antennas are not designed by electrical engineers, but guys with pointy hats and wands They use trial and error after starting with the result of some mystic ritual including lots of mumbling ...

posted 3y ago by Olin Lathrop‭

Answer
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Q&A Flyback converter design

Try searching for "multiple outputs flyback". Basically, you can't control each, individually, instead you make the voltage feedback as the average between the outputs. Here's a quick'n'dirty test ...

posted 2y ago by a concerned citizen‭

Answer
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Meta How can we grow this community?

After reading the suggestion about conferences, I came up with a loose brainstorming idea... What draws engineers to fairs/conferences (apart from free lunch)? Most definitely technical speeches/sl...

posted 2y ago by Lundin‭

Answer
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Q&A Flyback transformer with Intrinsic Safety

Please let me know if there is anything wrong with this logic. So far so good. The voltage clamp (3 zener diodes for European IS category iA and two for category iB) is the limiter on voltage ...

posted 2y ago by Andy aka‭  ·  edited 10mo ago by Lorenzo Donati‭

Answer
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Q&A What is sacrificed when buying cheaper oscilloscope probes (of same BW/cap/R/gain)

Some issues: Physical robustness. Some probes just are built better than others. How well does the clip pop off? How well does it stay on when you don't want it to pop off? How solid is the ho...

posted 2y ago by Olin Lathrop‭

Answer
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Q&A Via on pad: acceptable or not?

I am designing a PCB with somewhat limited space. To save space, I am placing some vias on component pads. However, I am not sure if this is a good practice in PCB design. As far as I understand, t...

1 answer  ·  posted 2y ago by Mu3‭  ·  last activity 2y ago by Olin Lathrop‭

Question pcb-layout